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mb/google/brya/var/brya0: Use auto-generated Makefile.inc 

This change adds mem_list_variant.txt that contains the only
memory parts used by brya0 for Proto-0 build and Makefile.inc
generated by gen_part_id.go using mem_list_variant.txt.

BUG=b:176491791

Change-Id: I3fe755564e7541a7abdfca0e5aa7fd786f5ca880
Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49454
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Amanda Huang 2021-01-14 15:20:58 +08:00 committed by Tim Wawrzynczak
parent 4891e0b4d1
commit 3765b50374
6 changed files with 26 additions and 0 deletions
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5
src/mainboard/google/brya/Kconfig
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@ -10,6 +10,7 @@ config BOARD_GOOGLE_BASEBOARD_BRYA
select EC_GOOGLE_CHROMEEC_ESPI select EC_GOOGLE_CHROMEEC_ESPI
select HAVE_ACPI_RESUME select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES
select HAVE_SPD_IN_CBFS
select INTEL_LPSS_UART_FOR_CONSOLE select INTEL_LPSS_UART_FOR_CONSOLE
select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_CHROMEOS
select SOC_INTEL_ALDERLAKE select SOC_INTEL_ALDERLAKE
@ -47,6 +48,10 @@ config VARIANT_DIR
string string
default "brya0" if BOARD_GOOGLE_BRYA0 default "brya0" if BOARD_GOOGLE_BRYA0
config DIMM_SPD_SIZE
int
default 512
config UART_FOR_CONSOLE config UART_FOR_CONSOLE
int int
default 0 default 0

2
src/mainboard/google/brya/Makefile.inc
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@ -13,6 +13,8 @@ VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR))
subdirs-y += variants/baseboard subdirs-y += variants/baseboard
subdirs-y += variants/$(VARIANT_DIR) subdirs-y += variants/$(VARIANT_DIR)
subdirs-y += variants/$(VARIANT_DIR)/memory
subdirs-y += spd
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include

11
src/mainboard/google/brya/spd/Makefile.inc Normal file
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@ -0,0 +1,11 @@
## SPDX-License-Identifier: GPL-2.0-or-later
##
ifneq ($(SPD_SOURCES),)
ifeq ($(SPD_SOURCE_PATH),)
SPD_SOURCE_PATH := src/soc/intel/alderlake/spd
endif
LIB_SPD_DEPS := $(foreach f, $(SPD_SOURCES), $(SPD_SOURCE_PATH)/$(f))
endif

5
src/mainboard/google/brya/variants/brya0/memory/Makefile.inc Normal file
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@ -0,0 +1,5 @@
## SPDX-License-Identifier: GPL-2.0-or-later
## This is an auto-generated file. Do not edit!!
SPD_SOURCES =
SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:F

2
src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt Normal file
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@ -0,0 +1,2 @@
DRAM Part Name ID to assign
MT53E512M32D2NP-046 WT:F 0 (0000)

1
src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt Normal file
View File

@ -0,0 +1 @@
MT53E512M32D2NP-046 WT:F