From 37b7a666a2c010319d3400380880d28fc53bfed5 Mon Sep 17 00:00:00 2001 From: Shawn Nematbakhsh Date: Tue, 24 Mar 2015 11:07:51 -0700 Subject: [PATCH] chromeec: Support accessing memmap data over port 62/66 Some platforms cannot access the 900h-9ffh region over the LPC bus, so it's necessary to access memmap data over the ACPI cmd / data ports. BUG=chrome-os-partner:38224 TEST=Manual on Samus. Define EC_GOOGLE_CHROMEEC_ACPI_MEMMAP. Verify system boots cleanly and battery status is updated immediately on plug / unplug. BRANCH=None Change-Id: Ifbed938668d3770750a44105e40fccb9babf62ed Signed-off-by: Patrick Georgi Original-Commit-Id: 14762261a6a32b2e96ee835e852b2c9537436ae3 Original-Signed-off-by: Shawn Nematbakhsh Original-Change-Id: Idb516ff60b973d8833a41c45eac5765dafb8ec6d Original-Reviewed-on: https://chromium-review.googlesource.com/262314 Original-Reviewed-by: Randall Spangler Reviewed-on: http://review.coreboot.org/9886 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/ec/google/chromeec/Kconfig | 10 ++++- src/ec/google/chromeec/acpi/ec.asl | 48 ++++----------------- src/ec/google/chromeec/acpi/emem.asl | 62 ++++++++++++++++++++++++++++ 3 files changed, 79 insertions(+), 41 deletions(-) create mode 100644 src/ec/google/chromeec/acpi/emem.asl diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig index 32a42133f2..48a92d9793 100644 --- a/src/ec/google/chromeec/Kconfig +++ b/src/ec/google/chromeec/Kconfig @@ -3,6 +3,14 @@ config EC_GOOGLE_CHROMEEC help Google's Chrome EC +config EC_GOOGLE_CHROMEEC_ACPI_MEMMAP + depends on EC_GOOGLE_CHROMEEC_LPC + def_bool n + help + When defined, ACPI accesses EC memmap data on ports 66h/62h. When + not defined, the memmap data is instead accessed on 900h-9ffh via + the LPC bus. + config EC_GOOGLE_CHROMEEC_I2C depends on EC_GOOGLE_CHROMEEC bool @@ -27,7 +35,7 @@ config EC_GOOGLE_CHROMEEC_I2C_PROTO3 Use only proto3 for i2c EC communication. config EC_GOOGLE_CHROMEEC_LPC - depends on EC_GOOGLE_CHROMEEC && ARCH_X86 # Needs Plug-and-play. + depends on EC_GOOGLE_CHROMEEC && ARCH_X86 # Needs Plug-and-play. def_bool y select SERIRQ_CONTINUOUS_MODE help diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl index 7cd8f75dbf..d59e951cfc 100644 --- a/src/ec/google/chromeec/acpi/ec.asl +++ b/src/ec/google/chromeec/acpi/ec.asl @@ -41,7 +41,7 @@ Device (EC0) Name (DWRN, 15) // Battery capacity warning at 15% Name (DLOW, 10) // Battery capacity low at 10% - OperationRegion (ERAM, EmbeddedControl, 0x00, 0xff) + OperationRegion (ERAM, EmbeddedControl, 0x00, EC_ACPI_MEM_MAPPED_BEGIN) Field (ERAM, ByteAcc, Lock, Preserve) { Offset (0x00), @@ -56,48 +56,16 @@ Device (EC0) CHGL, 8, // Charger Current Limit } +#if CONFIG_EC_GOOGLE_CHROMEEC_ACPI_MEMMAP + OperationRegion (EMEM, EmbeddedControl, + EC_ACPI_MEM_MAPPED_BEGIN, EC_ACPI_MEM_MAPPED_SIZE) + Field (EMEM, ByteAcc, Lock, Preserve) +#else OperationRegion (EMEM, SystemIO, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE) Field (EMEM, ByteAcc, NoLock, Preserve) +#endif { - Offset (0x00), - TIN0, 8, // Temperature 0 - TIN1, 8, // Temperature 1 - TIN2, 8, // Temperature 2 - TIN3, 8, // Temperature 3 - TIN4, 8, // Temperature 4 - TIN5, 8, // Temperature 5 - TIN6, 8, // Temperature 6 - TIN7, 8, // Temperature 7 - TIN8, 8, // Temperature 8 - TIN9, 8, // Temperature 9 - Offset (0x10), - FAN0, 16, // Fan Speed 0 - Offset (0x30), - LIDS, 1, // Lid Switch State - PBTN, 1, // Power Button Pressed - WPDI, 1, // Write Protect Disabled - RECK, 1, // Keyboard Initiated Recovery - RECD, 1, // Dedicated Recovery Mode - Offset (0x40), - BTVO, 32, // Battery Present Voltage - BTPR, 32, // Battery Present Rate - BTRA, 32, // Battery Remaining Capacity - ACEX, 1, // AC Present - BTEX, 1, // Battery Present - BFDC, 1, // Battery Discharging - BFCG, 1, // Battery Charging - BFCR, 1, // Battery Level Critical - Offset (0x50), - BTDA, 32, // Battery Design Capacity - BTDV, 32, // Battery Design Voltage - BTDF, 32, // Battery Last Full Charge Capacity - BTCC, 32, // Battery Cycle Count - BMFG, 64, // Battery Manufacturer String - BMOD, 64, // Battery Model String - BSER, 64, // Battery Serial String - BTYP, 64, // Battery Type String - Offset (0x80), - ALS0, 16, // ALS reading 0 in lux + #include "emem.asl" } Method (TINS, 1, Serialized) diff --git a/src/ec/google/chromeec/acpi/emem.asl b/src/ec/google/chromeec/acpi/emem.asl new file mode 100644 index 0000000000..5f34e7cc49 --- /dev/null +++ b/src/ec/google/chromeec/acpi/emem.asl @@ -0,0 +1,62 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * EMEM data may be accessed through port 62/66 or through LPC at 900h. + */ + +Offset (0x00), +TIN0, 8, // Temperature 0 +TIN1, 8, // Temperature 1 +TIN2, 8, // Temperature 2 +TIN3, 8, // Temperature 3 +TIN4, 8, // Temperature 4 +TIN5, 8, // Temperature 5 +TIN6, 8, // Temperature 6 +TIN7, 8, // Temperature 7 +TIN8, 8, // Temperature 8 +TIN9, 8, // Temperature 9 +Offset (0x10), +FAN0, 16, // Fan Speed 0 +Offset (0x30), +LIDS, 1, // Lid Switch State +PBTN, 1, // Power Button Pressed +WPDI, 1, // Write Protect Disabled +RECK, 1, // Keyboard Initiated Recovery +RECD, 1, // Dedicated Recovery Mode +Offset (0x40), +BTVO, 32, // Battery Present Voltage +BTPR, 32, // Battery Present Rate +BTRA, 32, // Battery Remaining Capacity +ACEX, 1, // AC Present +BTEX, 1, // Battery Present +BFDC, 1, // Battery Discharging +BFCG, 1, // Battery Charging +BFCR, 1, // Battery Level Critical +Offset (0x50), +BTDA, 32, // Battery Design Capacity +BTDV, 32, // Battery Design Voltage +BTDF, 32, // Battery Last Full Charge Capacity +BTCC, 32, // Battery Cycle Count +BMFG, 64, // Battery Manufacturer String +BMOD, 64, // Battery Model String +BSER, 64, // Battery Serial String +BTYP, 64, // Battery Type String +Offset (0x80), +ALS0, 16, // ALS reading 0 in lux