mb/google/brya: Fix a few mistakes in brya0 overridetree

1) Both SAR sensors had a UID of `2`, making them indistinguishable
2) No `device` underneath max98357a `chip`

Change-Id: Icf586229532819a7779652cbee73755b036dfbdc
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51145
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tim Wawrzynczak 2021-03-01 08:24:52 -07:00
parent a91eb90d44
commit 37c332782a
2 changed files with 3 additions and 1 deletions

View File

@ -3,6 +3,7 @@ config BOARD_GOOGLE_BASEBOARD_BRYA
select BOARD_ROMSIZE_KB_32768
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
select DRIVERS_GENERIC_MAX98357A
select DRIVERS_I2C_SX9324
select DRIVERS_SPI_ACPI
select DRIVERS_WIFI_GENERIC

View File

@ -73,7 +73,7 @@ chip soc/intel/alderlake
register "desc" = ""SAR1 Proximity Sensor""
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H19_IRQ)"
register "speed" = "I2C_SPEED_FAST"
register "uid" = "2"
register "uid" = "1"
register "reg_gnrl_ctrl0" = "0x16"
register "reg_gnrl_ctrl1" = "0x21"
register "reg_afe_ctrl0" = "0x00"
@ -183,6 +183,7 @@ chip soc/intel/alderlake
register "sdmode_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
register "sdmode_delay" = "5"
device generic 0 on end
end
end
device ref gspi1 on