From 3810705ef08b725a9b459ad5799b42a6a505bb92 Mon Sep 17 00:00:00 2001 From: Frank Chu Date: Fri, 21 Apr 2023 14:33:24 +0800 Subject: [PATCH] mb/google/brya/var/marasov: Disable USB2 PHY SUS well power gating The patch disables PCH USB2 PHY power gating to prevent possible display flicker issue. Please refer Intel doc#723158 for more information. BUG=b:279117758 BRANCH=firmware-brya-14505.B TEST=Verify the build for marasov board Signed-off-by: Frank Chu Change-Id: I5a5199be768fc59e2f053f8c50a49247145e7e72 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74627 Reviewed-by: Eric Lai Reviewed-by: Frank Chu Tested-by: build bot (Jenkins) --- src/mainboard/google/brya/variants/marasov/overridetree.cb | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/mainboard/google/brya/variants/marasov/overridetree.cb b/src/mainboard/google/brya/variants/marasov/overridetree.cb index dca4333474..075acf8e68 100644 --- a/src/mainboard/google/brya/variants/marasov/overridetree.cb +++ b/src/mainboard/google/brya/variants/marasov/overridetree.cb @@ -85,6 +85,11 @@ chip soc/intel/alderlake .v1p05_icc_max_ma = 500, .vnn_sx_voltage_mv = 1250, }" + + # As per Intel Advisory doc#723158, the change is required to prevent possible + # display flickering issue. + register "usb2_phy_sus_pg_disable" = "1" + register "serial_io_i2c_mode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci,