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mb/lenovo/{x230, x230s}: Disable SuperSpeed capabilities for WWAN USB 

Although on ThinkPads with Panther Point PCH the usb port inside wwan
socket is usually wired to XHCI, it has actually no SuperSpeed lines,
so maybe it is okay to disable SuperSpeed capabilities, and wire them
to EHCI #2 by making use of XUSB2PRM and USB3PRM.

This applies to both variants of x230.

Change-Id: Ia8d27be84e4dbfa0efed506b9fc010e7f4d6ba23
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41505
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Bill XIE 2020-05-18 17:18:43 +08:00 committed by Patrick Georgi
parent d87277abbf
commit 38569d0610
1 changed files with 3 additions and 2 deletions
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5
src/mainboard/lenovo/x230/devicetree.cb
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@ -58,8 +58,9 @@ chip northbridge/intel/sandybridge
register "gen2_dec" = "0x0c15e1" register "gen2_dec" = "0x0c15e1"
register "gen4_dec" = "0x0c06a1" register "gen4_dec" = "0x0c06a1"
register "xhci_switchable_ports" = "0xf" # Do not enable xHCI Port 4 since WWAN USB is EHCI-only
register "superspeed_capable_ports" = "0xf" register "xhci_switchable_ports" = "0x7"
register "superspeed_capable_ports" = "0x7"
register "xhci_overcurrent_mapping" = "0x4000201" register "xhci_overcurrent_mapping" = "0x4000201"
# Enable zero-based linear PCIe root port functions # Enable zero-based linear PCIe root port functions