GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/skylake: provide poweroff() implementation 

Implement poweroff() by putting the chipset into ACPI S5 state.

BUG=chrome-os-partner:54977

Change-Id: I9288dcee13347a8aa3f822ca3d75148ba2792859
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15688
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Aaron Durbin 2016-07-14 00:56:58 -05:00
parent 1a75560599
commit 38613d079d
1 changed files with 7 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
src/soc/intel/skylake/pmutil.c
View File

@ -24,6 +24,7 @@
#include <device/pci.h> #include <device/pci.h>
#include <device/pci_def.h> #include <device/pci_def.h>
#include <console/console.h> #include <console/console.h>
#include <halt.h>
#include <stdlib.h> #include <stdlib.h>
#include <soc/gpio.h> #include <soc/gpio.h>
#include <soc/iomap.h> #include <soc/iomap.h>
@ -430,3 +431,9 @@ uint16_t pmc_tco_regs(void)
return reg16; return reg16;
} }
void poweroff(void)
{
enable_pm1_control(SLP_EN | (SLP_TYP_S5 << SLP_TYP_SHIFT));
halt();
}