mb/google/kahlee: Enable 2T mode for liara in DVT phase

Change the board id detection to support rev5, since the 2T mode still
needed in DVT build.

BUG=b:116082728
TEST=verify by ODM.

Change-Id: Ibb4cc1fd2bb54984cb7a8856ed7b9f49b78eddce
Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/29779
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Chris Wang 2018-11-22 00:03:29 +08:00 committed by Martin Roth
parent caf6d0bc52
commit 386b084ee1
1 changed files with 1 additions and 1 deletions

View File

@ -58,7 +58,7 @@ static const PSO_ENTRY DDR4LiaraMemoryConfiguration[] = {
void OemPostParams(AMD_POST_PARAMS *PostParams) void OemPostParams(AMD_POST_PARAMS *PostParams)
{ {
if ((IS_ENABLED(CONFIG_BOARD_GOOGLE_LIARA)) && (board_id() <= 4)) if ((IS_ENABLED(CONFIG_BOARD_GOOGLE_LIARA)) && (board_id() <= 5))
PostParams->MemConfig.PlatformMemoryConfiguration = PostParams->MemConfig.PlatformMemoryConfiguration =
(PSO_ENTRY *)DDR4LiaraMemoryConfiguration; (PSO_ENTRY *)DDR4LiaraMemoryConfiguration;
else else