From 387ec919d9f74947b84ed08d5eece8b2f0ca9cae Mon Sep 17 00:00:00 2001 From: Tracy Wu Date: Thu, 22 Dec 2022 16:28:15 +0800 Subject: [PATCH] soc/intel/alderlake: Select SOC_INTEL_CSE_SEND_EOP_LATE With enabling FSP Notify Phase APIs, it has chance to issue a global reset in FSP after CSE EOP (with selecting SOC_INTEL_CSE_SEND_EOP_EARLY ), which CSE already in idle mode and cause failure. For this reason we should drop SOC_INTEL_CSE_SEND_EOP_EARLY in all ADL sku and select SOC_INTEL_CSE_SEND_EOP_LATE instead. BUG=b:261544011 BRANCH=firmware-brya-14505.B TEST=tested and verified on Marasov, make sure this kind of global reset can be executed successfully. Signed-off-by: Tracy Wu Change-Id: I29736ca8efee64dd03feb48404241ee6295b7c72 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71224 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik --- src/soc/intel/alderlake/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 3526929a22..9d950a71b6 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -117,8 +117,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_FSP_RESET select SOC_INTEL_COMMON_PCH_CLIENT select SOC_INTEL_COMMON_RESET - select SOC_INTEL_CSE_SEND_EOP_EARLY if !SOC_INTEL_ALDERLAKE_PCH_N - select SOC_INTEL_CSE_SEND_EOP_LATE if SOC_INTEL_ALDERLAKE_PCH_N + select SOC_INTEL_CSE_SEND_EOP_LATE select SOC_INTEL_CSE_SET_EOP select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION select HAVE_INTEL_COMPLIANCE_TEST_MODE