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arch/x86: Enable SSE in bootblock_crt0.S 

Don't write reserved bits in the Quark platform.  Follow the previous
boot behavior and just enable SSE.

TEST=Build and run on Galileo Gen2

Change-Id: Ib3143eff02b2610b595bd666c10d70e43103ccda
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15128
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Lee Leahy 2016-06-08 07:11:48 -07:00 committed by Leroy P Leahy
parent 538b324c5f
commit 3892597349
1 changed files with 2 additions and 6 deletions
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8
src/arch/x86/bootblock_crt0.S
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@ -41,14 +41,10 @@ bootblock_protected_mode_entry:
movd %eax, %mm1
movd %edx, %mm2
#if !IS_ENABLED(CONFIG_SSE)
#if IS_ENABLED(CONFIG_SSE)
enable_sse:
mov %cr0, %eax
and $~CR0_EM, %ax /* Clear coprocessor emulation CR0.EM */
or $CR0_MP, %ax /* Set coprocessor monitoring CR0.MP */
mov %eax, %cr0
mov %cr4, %eax
or $(CR4_OSFXSR | CR4_OSXMMEXCPT), %ax
or $CR4_OSFXSR, %ax
mov %eax, %cr4
#endif /* IS_ENABLED(CONFIG_SSE) */