ec/google/chromeec: Add driver for i2c_tunnel device under Chrome EC
This change enables support for generating ACPI nodes for I2C tunnel for any GOOG0012 device that is sitting behind the Chrome EC. It accepts a config "remote_bus" which allows mainboard to configure the id of the remote bus that is being tunneled. BUG=b:154290952 BRANCH=None TEST=Verified that SSDT node for I2C tunnel behind Chrome EC is generated correctly. Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: Icfc0ec3725d7f1d20bcb5cb43a0a23aac72bf4eb Reviewed-on: https://review.coreboot.org/c/coreboot/+/40515 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -196,3 +196,9 @@ config EC_GOOGLE_CHROMEEC_SWITCHES
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help
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Enable support for Chrome OS mode switches provided by the Chrome OS
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EC.
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if EC_GOOGLE_CHROMEEC
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source "src/ec/google/chromeec/*/Kconfig"
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endif
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@ -1,5 +1,7 @@
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ifeq ($(CONFIG_EC_GOOGLE_CHROMEEC),y)
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subdirs-y += i2c_tunnel
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bootblock-$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDID) += ec_boardid.c
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verstage-$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDID) += ec_boardid.c
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romstage-$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDID) += ec_boardid.c
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@ -0,0 +1,6 @@
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config EC_GOOGLE_CHROMEEC_I2C_TUNNEL
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bool
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depends on HAVE_ACPI_TABLES
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help
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This enables the Cros EC I2C tunnel driver that is required to fill the
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SSDT nodes for the I2C tunnel used by the mainboard.
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@ -0,0 +1 @@
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ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_I2C_TUNNEL) += i2c_tunnel.c
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@ -0,0 +1,16 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* This file is part of the coreboot project. */
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#ifndef __EC_GOOGLE_CHROMEEC_I2C_TUNNEL__
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#define __EC_GOOGLE_CHROMEEC_I2C_TUNNEL__
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struct ec_google_chromeec_i2c_tunnel_config {
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/* ACPI device name */
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const char *name;
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/* ACPI _UID */
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unsigned int uid;
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/* EC I2C bus number we tunnel to on the other side. */
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unsigned int remote_bus;
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};
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#endif /* __EC_GOOGLE_CHROMEEC_I2C_TUNNEL__ */
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@ -0,0 +1,71 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* This file is part of the coreboot project. */
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#include <arch/acpi_device.h>
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#include <arch/acpigen.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/path.h>
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#include <string.h>
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#include "chip.h"
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#define CROS_EC_I2C_TUNNEL_HID "GOOG0012"
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#define CROS_EC_I2C_TUNNEL_DDN "Cros EC I2C Tunnel"
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static void crosec_i2c_tunnel_fill_ssdt(struct device *dev)
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{
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const char *scope = acpi_device_scope(dev);
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struct ec_google_chromeec_i2c_tunnel_config *cfg = dev->chip_info;
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struct acpi_dp *dsd;
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if (!dev->enabled || !scope || !cfg)
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return;
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acpigen_write_scope(scope);
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acpigen_write_device(acpi_device_name(dev));
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acpigen_write_name_string("_HID", CROS_EC_I2C_TUNNEL_HID);
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acpigen_write_name_integer("_UID", cfg->uid);
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acpigen_write_name_string("_DDN", CROS_EC_I2C_TUNNEL_DDN);
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acpigen_write_STA(acpi_device_status(dev));
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dsd = acpi_dp_new_table("_DSD");
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acpi_dp_add_integer(dsd, "google,remote-bus", cfg->remote_bus);
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acpi_dp_write(dsd);
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acpigen_pop_len(); /* Device */
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acpigen_pop_len(); /* Scope */
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printk(BIOS_INFO, "%s: %s at %s\n", acpi_device_path(dev), CROS_EC_I2C_TUNNEL_DDN,
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dev_path(dev));
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}
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static const char *crosec_i2c_tunnel_acpi_name(const struct device *dev)
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{
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struct ec_google_chromeec_i2c_tunnel_config *cfg = dev->chip_info;
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static char name[5];
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if (cfg->name)
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return cfg->name;
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snprintf(name, sizeof(name), "TUN%X", dev->path.generic.id);
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return name;
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}
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static struct device_operations crosec_i2c_tunnel_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.acpi_name = crosec_i2c_tunnel_acpi_name,
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.acpi_fill_ssdt = crosec_i2c_tunnel_fill_ssdt,
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.scan_bus = scan_static_bus,
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};
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static void crosec_i2c_tunnel_enable(struct device *dev)
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{
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dev->ops = &crosec_i2c_tunnel_ops;
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}
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struct chip_operations ec_google_chromeec_i2c_tunnel_ops = {
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CHIP_NAME("CrosEC I2C Tunnel Device")
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.enable_dev = crosec_i2c_tunnel_enable
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};
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