payloads/tianocore: default to MrChromebox's working branch
Rather than attempt to maintain patches against upstream Tianocore, use MrChromebox's coreboot framebuffer branch as the default build target. Rework the Makefile to default to MrChromebox's coreboot_fb branch, but also allow for aribitrary commits from upstream Tianocore to be used as build targets. Ensure the branch is synced on each build, as long as working directory is clean, and that switching between commits or trees is handled sanely. Eliminate TIANOCORE_MASTER as a selectable build target, since unpatched it is unlikely to boot on any device. It can easily be specified via the 'revision' option if desired. Test: build for the default stable target, for upstream/master as the specified revision, and for an arbitrary valid commit hash. Change-Id: I4a83db3cd64c7d5b652c6e95780d10051f143e88 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/31543 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Matt DeVillier
Patrick Georgi
parent
da7ffb48b2
commit
38b6ccfed9
|
|
@ -11,28 +11,22 @@ choice
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default TIANOCORE_STABLE
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help
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Select which version of Tianocore to build (default is to build stable)
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stable: a version of Tianocore that builds without any errors
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master: most recent version from upstream Tianocore repository
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stable: MrChromebox's customized version of Tianocore which works on most
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(all?) x86_64 devices
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revision: use specific commit or branch to build Tianocore (specified by user)
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config TIANOCORE_STABLE
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bool "stable"
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help
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Select this option to build the stable tianocore version
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i.e. a version of Tianocore that builds without any errors
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config TIANOCORE_MASTER
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bool "master"
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help
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Select this option to build the master tianocore version
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i.e. most recent version from upstream Tianocore repository
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Select this option to build using MrChromebox's custom Tianocore tree
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i.e. a version of Tianocore that builds without any errors and just works.
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config TIANOCORE_REVISION
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bool "git revision"
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help
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Select this option if you have a specific commit or branch
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that you want to use as the revision from which to
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build Tianocore.
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that you want to use from either MrChromebox's tree or upstream
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EDK2 from which to build Tianocore.
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You will be able to specify the name of a branch or a commit id
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later.
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@ -42,7 +36,7 @@ endchoice
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config TIANOCORE_REVISION_ID
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string "Insert a commit's SHA-1 or a branch name"
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depends on TIANOCORE_REVISION
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default "origin/master"
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default "upstream/master"
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help
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The commit's SHA-1 or branch name of the revision to use.
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|
|
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@ -16,15 +16,15 @@
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# force the shell to bash - the edksetup.sh script doesn't work with dash
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export SHELL := env bash
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# STABLE_COMMIT_ID represent official edk2 release, currently UDK2018
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STABLE_COMMIT_ID=3e72ffe8afdd03f1f89eba65c921cbdcb004cfee
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TAG-$(CONFIG_TIANOCORE_MASTER)=origin/master
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TAG-$(CONFIG_TIANOCORE_STABLE)=$(STABLE_COMMIT_ID)
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TAG-$(CONFIG_TIANOCORE_REVISION)=$(CONFIG_TIANOCORE_REVISION_ID)
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project_name=Tianocore
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project_dir=$(CURDIR)/tianocore
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project_git_repo=https://github.com/tianocore/edk2
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project_git_repo=https://github.com/mrchromebox/edk2
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project_git_branch=coreboot_fb
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upstream_git_repo=https://github.com/tianocore/edk2
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# STABLE revision is MrChromebox's coreboot framebuffer (coreboot_fb) branch
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TAG-$(CONFIG_TIANOCORE_STABLE)=origin/$(project_git_branch)
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TAG-$(CONFIG_TIANOCORE_REVISION)=$(CONFIG_TIANOCORE_REVISION_ID)
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export EDK_TOOLS_PATH=$(project_dir)/BaseTools
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@ -44,39 +44,28 @@ else
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BUILD_STR=-a IA32 -a X64 -t COREBOOT -p CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc -b $(BUILD_TYPE) $(TIMER)
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endif
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all: build
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all: clean build
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$(project_dir):
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echo " Cloning $(project_name) from Git"
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git clone $(project_git_repo) $(project_dir)
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fetch: $(project_dir)
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git clone --single-branch --branch $(project_git_branch) $(project_git_repo) $(project_dir); \
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cd $(project_dir); \
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git remote add upstream $(upstream_git_repo)
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update: $(project_dir)
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cd $(project_dir); \
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git show $(TAG-y) >/dev/null 2>&1 ; \
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if [ $$? -ne 0 ] || [ "$(TAG-y)" = "origin/master" ]; then \
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echo " Fetching new commits from the $(project_name) repo"; \
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git fetch; \
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fi
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$(project_dir)/.version_$(TAG-y): fetch
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if ! [[ -e $(project_dir)/.version_$(STABLE_COMMIT_ID) ]] || \
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[ "$(TAG-y)" = "origin/master" ] ; then \
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rm -f .version_*; \
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git fetch --multiple origin upstream 2>/dev/null; \
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if ! git rev-parse --verify -q $(TAG-y) >/dev/null; then \
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echo " $(TAG-y) is not a valid git reference"; \
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exit 1; \
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fi; \
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if git describe --all --dirty | grep -qv dirty; then \
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echo " Checking out $(project_name) revision $(TAG-y)"; \
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cd $(project_dir); \
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git checkout master; \
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git branch -D coreboot 2>/dev/null; \
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git checkout -b coreboot $(TAG-y); \
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for patch in $(CURDIR)/patches/*.patch; do \
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echo "Applying $$patch"; \
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cd $(project_dir); \
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git am --keep-cr --ignore-space-change $$patch || \
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( echo " Error when applying patches.\n"; git am --abort; exit 1; ); \
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done; \
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if ! [ "$(TAG-y)" = "origin/master" ] ; then \
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touch $(project_dir)/.version_$(STABLE_COMMIT_ID); \
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fi; \
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fi; \
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git checkout --detach $(TAG-y); \
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else \
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echo " Working directory not clean; will not overwrite"; \
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fi
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|
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checktools:
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echo "Checking uuid-dev..."
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|
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@ -89,7 +78,7 @@ checktools:
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type nasm > /dev/null 2>&1 && echo " found nasm." || \
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( echo " Not found."; echo "Error: Please install nasm."; exit 1 )
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|
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build: $(project_dir)/.version_$(TAG-y) checktools
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build: update checktools
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unset CC; $(MAKE) -C $(project_dir)/BaseTools
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echo " build $(project_name) $(TAG-y)"
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cd $(project_dir); \
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@ -109,4 +98,4 @@ clean:
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distclean:
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rm -rf $(project_dir)
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.PHONY: all fetch checkout checktools config build clean distclean
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.PHONY: all update checktools config build clean distclean
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|
|
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|
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@ -1,65 +0,0 @@
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From c3da734cd08117ce2d5cd48367f5a94848aa9321 Mon Sep 17 00:00:00 2001
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From: CoolStar <coolstarorganization@gmail.com>
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Date: Sun, 4 Dec 2016 11:23:38 -0800
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Subject: [PATCH] PCI: use Duet's PciNoEnumeration
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|
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---
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CorebootPayloadPkg/CorebootPayloadPkg.fdf | 4 ++--
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CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc | 7 ++-----
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CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 7 ++-----
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3 files changed, 6 insertions(+), 12 deletions(-)
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diff --git a/CorebootPayloadPkg/CorebootPayloadPkg.fdf b/CorebootPayloadPkg/CorebootPayloadPkg.fdf
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index 7994f0c94928..d71b3ec55690 100644
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--- a/CorebootPayloadPkg/CorebootPayloadPkg.fdf
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+++ b/CorebootPayloadPkg/CorebootPayloadPkg.fdf
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@@ -124,8 +124,8 @@ INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
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#
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# PCI Support
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#
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-INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
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-INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
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+INF DuetPkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf
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+INF DuetPkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf
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|
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#
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# ISA Support
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diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
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index ace1bc0a3726..0f4e475187ee 100644
|
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--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
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+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
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@@ -450,11 +450,8 @@
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#
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# PCI Support
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#
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- MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
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- MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
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- <LibraryClasses>
|
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- PciHostBridgeLib|CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
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- }
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+ DuetPkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf
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+ DuetPkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf
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|
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#
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# SCSI/ATA/IDE/DISK Support
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diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
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index 2492142b972d..97bb0a8ae0a1 100644
|
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--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
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+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
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@@ -451,11 +451,8 @@
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#
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# PCI Support
|
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#
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- MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
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- MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
|
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- <LibraryClasses>
|
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- PciHostBridgeLib|CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
|
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- }
|
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+ DuetPkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf
|
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+ DuetPkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf
|
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|
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#
|
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# SCSI/ATA/IDE/DISK Support
|
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--
|
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2.17.0
|
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|
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File diff suppressed because it is too large
Load Diff
|
|
@ -1,86 +0,0 @@
|
|||
From 1e9c5c97a55f3ad3c0d6d5dde380b4d73bd15860 Mon Sep 17 00:00:00 2001
|
||||
From: CoolStar <coolstarorganization@gmail.com>
|
||||
Date: Sun, 4 Dec 2016 12:07:30 -0800
|
||||
Subject: [PATCH] CorebootBdsLib: Call End of DXE event to allow booting 3rd
|
||||
party efi binaries.
|
||||
|
||||
---
|
||||
.../Library/CorebootBdsLib/BdsPlatform.c | 42 +++++++++++++++++++
|
||||
.../Library/CorebootBdsLib/PlatformBds.inf | 1 +
|
||||
2 files changed, 43 insertions(+)
|
||||
|
||||
diff --git a/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.c b/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.c
|
||||
index b6253a17f8ea..cf3e5320cbe8 100644
|
||||
--- a/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.c
|
||||
+++ b/CorebootModulePkg/Library/CorebootBdsLib/BdsPlatform.c
|
||||
@@ -1129,6 +1129,46 @@ Returns:
|
||||
Status = BaseMemoryTest (MemoryTestLevel);
|
||||
}
|
||||
|
||||
+VOID
|
||||
+EFIAPI
|
||||
+InternalBdsEmptyCallbackFuntion (
|
||||
+ IN EFI_EVENT Event,
|
||||
+ IN VOID *Context
|
||||
+ )
|
||||
+{
|
||||
+ return;
|
||||
+}
|
||||
+
|
||||
+VOID
|
||||
+InstallReadyToLock (
|
||||
+ VOID
|
||||
+ )
|
||||
+{
|
||||
+ EFI_STATUS Status;
|
||||
+ EFI_EVENT EndOfDxeEvent;
|
||||
+
|
||||
+ DEBUG((DEBUG_INFO,"InstallReadyToLock entering......\n"));
|
||||
+ //
|
||||
+ // Inform the SMM infrastructure that we're entering BDS and may run 3rd party code hereafter
|
||||
+ // Since PI1.2.1, we need signal EndOfDxe as ExitPmAuth
|
||||
+ //
|
||||
+ Status = gBS->CreateEventEx (
|
||||
+ EVT_NOTIFY_SIGNAL,
|
||||
+ TPL_CALLBACK,
|
||||
+ InternalBdsEmptyCallbackFuntion,
|
||||
+ NULL,
|
||||
+ &gEfiEndOfDxeEventGroupGuid,
|
||||
+ &EndOfDxeEvent
|
||||
+ );
|
||||
+ ASSERT_EFI_ERROR (Status);
|
||||
+ gBS->SignalEvent (EndOfDxeEvent);
|
||||
+ gBS->CloseEvent (EndOfDxeEvent);
|
||||
+ DEBUG((DEBUG_INFO,"All EndOfDxe callbacks have returned successfully\n"));
|
||||
+
|
||||
+ DEBUG((DEBUG_INFO,"InstallReadyToLock end\n"));
|
||||
+ return;
|
||||
+}
|
||||
+
|
||||
VOID
|
||||
EFIAPI
|
||||
PlatformBdsPolicyBehavior (
|
||||
@@ -1164,6 +1204,8 @@ Returns:
|
||||
EFI_INPUT_KEY Key;
|
||||
EFI_BOOT_MODE BootMode;
|
||||
|
||||
+ InstallReadyToLock();
|
||||
+
|
||||
//
|
||||
// Init the time out value
|
||||
//
|
||||
diff --git a/CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf b/CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf
|
||||
index 578c74afae22..992bd846bdc4 100644
|
||||
--- a/CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf
|
||||
+++ b/CorebootModulePkg/Library/CorebootBdsLib/PlatformBds.inf
|
||||
@@ -58,6 +58,7 @@
|
||||
gEfiSmbiosTableGuid
|
||||
gEfiAcpiTableGuid
|
||||
gLdrMemoryDescriptorGuid
|
||||
+ gEfiEndOfDxeEventGroupGuid
|
||||
|
||||
[Pcd]
|
||||
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
|
||||
--
|
||||
2.17.0
|
||||
|
||||
|
|
@ -1,56 +0,0 @@
|
|||
From e8d6ed35c15b92497cd3ede6cd35523b0e7366ac Mon Sep 17 00:00:00 2001
|
||||
From: CoolStar <coolstarorganization@gmail.com>
|
||||
Date: Sun, 4 Dec 2016 11:50:00 -0800
|
||||
Subject: [PATCH] CorebootPayloadPkg: Add PS/2 keyboard drivers.
|
||||
|
||||
---
|
||||
CorebootPayloadPkg/CorebootPayloadPkg.fdf | 3 +++
|
||||
CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc | 3 +++
|
||||
CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 3 +++
|
||||
3 files changed, 9 insertions(+)
|
||||
|
||||
diff --git a/CorebootPayloadPkg/CorebootPayloadPkg.fdf b/CorebootPayloadPkg/CorebootPayloadPkg.fdf
|
||||
index 22987093da58..0961e96c250d 100644
|
||||
--- a/CorebootPayloadPkg/CorebootPayloadPkg.fdf
|
||||
+++ b/CorebootPayloadPkg/CorebootPayloadPkg.fdf
|
||||
@@ -132,6 +132,9 @@ INF DuetPkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf
|
||||
# ISA Support
|
||||
#
|
||||
INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
|
||||
+INF PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf
|
||||
+INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
|
||||
+INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
|
||||
|
||||
#
|
||||
# Console Support
|
||||
diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
|
||||
index 053f380a8608..6ddd64faf7a5 100644
|
||||
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
|
||||
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
|
||||
@@ -492,6 +492,9 @@
|
||||
# ISA Support
|
||||
#
|
||||
MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
|
||||
+ PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf
|
||||
+ IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
|
||||
+ IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
|
||||
|
||||
#
|
||||
# Console Support
|
||||
diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
|
||||
index bb328349b44a..19c203e6cbb6 100644
|
||||
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
|
||||
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
|
||||
@@ -493,6 +493,9 @@
|
||||
# ISA Support
|
||||
#
|
||||
MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
|
||||
+ PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf
|
||||
+ IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
|
||||
+ IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
|
||||
|
||||
#
|
||||
# Console Support
|
||||
--
|
||||
2.17.0
|
||||
|
||||
|
|
@ -1,46 +0,0 @@
|
|||
From 147174ea833e14ef68a8c5f1366cfbd1468dd1c8 Mon Sep 17 00:00:00 2001
|
||||
From: Wonkyu Kim <wonkyu.kim@intel.com>
|
||||
Date: Wed, 10 Oct 2018 10:59:51 -0700
|
||||
Subject: [PATCH] CorebootPayloadPkg: don't use serial output for Release build
|
||||
|
||||
Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
|
||||
---
|
||||
CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc | 4 ++++
|
||||
CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 4 ++++
|
||||
2 files changed, 8 insertions(+)
|
||||
|
||||
diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
|
||||
index 6ddd64faf7a5..2e7055815add 100644
|
||||
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
|
||||
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
|
||||
@@ -261,7 +261,11 @@
|
||||
#
|
||||
################################################################################
|
||||
[PcdsFeatureFlag]
|
||||
+!if $(TARGET) == DEBUG
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE
|
||||
+!else
|
||||
+ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
|
||||
+!endif
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|FALSE
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
|
||||
diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
|
||||
index 19c203e6cbb6..b00b7b0e1134 100644
|
||||
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
|
||||
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
|
||||
@@ -261,7 +261,11 @@
|
||||
#
|
||||
################################################################################
|
||||
[PcdsFeatureFlag]
|
||||
+!if $(TARGET) == DEBUG
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE
|
||||
+!else
|
||||
+ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
|
||||
+!endif
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|TRUE
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
|
||||
--
|
||||
2.17.1
|
||||
|
||||
|
|
@ -1,30 +0,0 @@
|
|||
From 9c28ac87eb2df7319d4f5a48124c837b8bf123b3 Mon Sep 17 00:00:00 2001
|
||||
From: ReddestDream <reddestdream@gmail.com>
|
||||
Date: Wed, 3 May 2017 00:13:28 -0400
|
||||
Subject: [PATCH] CbSupportPei: prevent lower coreboot table from being
|
||||
overwritten
|
||||
|
||||
Exclude the bottom 4kb from being included in System Memory HoB
|
||||
---
|
||||
CorebootModulePkg/CbSupportPei/CbSupportPei.c | 5 +++--
|
||||
1 file changed, 3 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/CorebootModulePkg/CbSupportPei/CbSupportPei.c b/CorebootModulePkg/CbSupportPei/CbSupportPei.c
|
||||
index 831de89b21d1..e84b9b55288a 100755
|
||||
--- a/CorebootModulePkg/CbSupportPei/CbSupportPei.c
|
||||
+++ b/CorebootModulePkg/CbSupportPei/CbSupportPei.c
|
||||
@@ -261,8 +261,9 @@ CbPeiEntryPoint (
|
||||
EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
|
||||
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
|
||||
),
|
||||
- (EFI_PHYSICAL_ADDRESS)(0),
|
||||
- (UINT64)(0xA0000)
|
||||
+ // Lower 640KB, except for first 4KB where the lower coreboot pointer ("LBIO") resides
|
||||
+ (EFI_PHYSICAL_ADDRESS)(0 + 0x1000),
|
||||
+ (UINT64)(0xA0000 - 0x1000)
|
||||
);
|
||||
|
||||
|
||||
--
|
||||
2.17.0
|
||||
|
||||
|
|
@ -1,34 +0,0 @@
|
|||
From 2e75f9ad6ef625575185dfc262c6803a89850dd5 Mon Sep 17 00:00:00 2001
|
||||
From: Arthur Heymans <arthur@aheymans.xyz>
|
||||
Date: Wed, 24 Jan 2018 10:07:08 +0100
|
||||
Subject: [PATCH] CorebootPayloadPkg: Use correct BytesPerScanLine
|
||||
|
||||
Fetch BytesPerScanLine from coreboot table to reflect how the actual
|
||||
framebuffer is set up instead of guessing it from the horizontal
|
||||
resolution.
|
||||
|
||||
This fixes a garbled display when HorizontalResolution * (BitsPerPixel
|
||||
/ 8) and pFbInfo->BytesPerScanLine don't match.
|
||||
|
||||
Contributed-under: TianoCore Contribution Agreement 1.1
|
||||
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
|
||||
---
|
||||
CorebootPayloadPkg/FbGop/FbGop.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/CorebootPayloadPkg/FbGop/FbGop.c b/CorebootPayloadPkg/FbGop/FbGop.c
|
||||
index 37d6def7f780..679061703358 100644
|
||||
--- a/CorebootPayloadPkg/FbGop/FbGop.c
|
||||
+++ b/CorebootPayloadPkg/FbGop/FbGop.c
|
||||
@@ -822,7 +822,7 @@ FbGopCheckForVbe (
|
||||
BitsPerPixel = pFbInfo->BitsPerPixel;
|
||||
HorizontalResolution = pFbInfo->HorizontalResolution;
|
||||
VerticalResolution = pFbInfo->VerticalResolution;
|
||||
- BytesPerScanLine = HorizontalResolution * (BitsPerPixel / 8);
|
||||
+ BytesPerScanLine = pFbInfo->BytesPerScanLine;
|
||||
|
||||
ModeBuffer = (FB_VIDEO_MODE_DATA *) AllocatePool (
|
||||
ModeNumber * sizeof (FB_VIDEO_MODE_DATA)
|
||||
--
|
||||
2.17.0
|
||||
|
||||
|
|
@ -1,38 +0,0 @@
|
|||
From 8cb365e9ec90420e3d04b77f6e7999a65d5983a6 Mon Sep 17 00:00:00 2001
|
||||
From: Patrick Rudolph <siro@das-labor.org>
|
||||
Date: Sun, 17 Jun 2018 08:44:51 +0200
|
||||
Subject: [PATCH] BaseTools: Fix building with -Werror=stringop-truncation
|
||||
|
||||
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
|
||||
---
|
||||
BaseTools/Source/C/GenVtf/GenVtf.c | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/BaseTools/Source/C/GenVtf/GenVtf.c b/BaseTools/Source/C/GenVtf/GenVtf.c
|
||||
index 65ae08eeceb8..d4200621457c 100644
|
||||
--- a/BaseTools/Source/C/GenVtf/GenVtf.c
|
||||
+++ b/BaseTools/Source/C/GenVtf/GenVtf.c
|
||||
@@ -129,9 +129,9 @@ Returns:
|
||||
} else {
|
||||
Length = strlen(Str);
|
||||
if (Length < 4) {
|
||||
- strncpy (TemStr + 4 - Length, Str, Length);
|
||||
+ memcpy (TemStr + 4 - Length, Str, Length);
|
||||
} else {
|
||||
- strncpy (TemStr, Str + Length - 4, 4);
|
||||
+ memcpy (TemStr, Str + Length - 4, 4);
|
||||
}
|
||||
|
||||
sscanf (
|
||||
@@ -1521,7 +1521,7 @@ Returns:
|
||||
//
|
||||
FitStartPtr = (FIT_TABLE *) RelativeAddress;
|
||||
|
||||
- strncpy ((CHAR8 *) &FitStartPtr->CompAddress, FIT_SIGNATURE, 8); // "_FIT_ "
|
||||
+ memcpy ((CHAR8 *) &FitStartPtr->CompAddress, FIT_SIGNATURE, 8); // "_FIT_ "
|
||||
assert (((VtfInfo->CompSize & 0x00FFFFFF) % 16) == 0);
|
||||
FitStartPtr->CompSize = (VtfInfo->CompSize & 0x00FFFFFF) / 16;
|
||||
FitStartPtr->CompVersion = MAKE_VERSION (VtfInfo->MajorVer, VtfInfo->MinorVer);
|
||||
--
|
||||
2.17.0
|
||||
|
||||
Loading…
Reference in New Issue