mainboard/google/butterfly: Fix usage of GNU field designator ext
Following the reasoning in,
8089f17
mainboard/lenovo/x230 Fix usage of GNU field designator extension
In C99 we defined a syntax for this. GCC's old syntax was deprecated.
Change-Id: I167d2c9ad3f690de41fee51dd7800ce76b328e41
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7231
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
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@ -119,33 +119,33 @@ void main(unsigned long bist)
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int cbmem_was_initted;
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struct pei_data pei_data = {
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pei_version: PEI_VERSION,
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mchbar: DEFAULT_MCHBAR,
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dmibar: DEFAULT_DMIBAR,
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epbar: DEFAULT_EPBAR,
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pciexbar: CONFIG_MMCONF_BASE_ADDRESS,
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smbusbar: SMBUS_IO_BASE,
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wdbbar: 0x4000000,
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wdbsize: 0x1000,
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hpet_address: CONFIG_HPET_ADDRESS,
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rcba: DEFAULT_RCBABASE,
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pmbase: DEFAULT_PMBASE,
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gpiobase: DEFAULT_GPIOBASE,
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thermalbase: 0xfed08000,
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system_type: 0, // 0 Mobile, 1 Desktop/Server
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tseg_size: CONFIG_SMM_TSEG_SIZE,
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spd_addresses: { 0xA0, 0x00,0xA4,0x00 },
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ts_addresses: { 0x00, 0x00, 0x00, 0x00 },
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ec_present: 1,
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ddr3lv_support: 0,
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.pei_version = PEI_VERSION,
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.mchbar = DEFAULT_MCHBAR,
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.dmibar = DEFAULT_DMIBAR,
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.epbar = DEFAULT_EPBAR,
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.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
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.smbusbar = SMBUS_IO_BASE,
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.wdbbar = 0x4000000,
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.wdbsize = 0x1000,
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.hpet_address = CONFIG_HPET_ADDRESS,
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.rcba = DEFAULT_RCBABASE,
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.pmbase = DEFAULT_PMBASE,
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.gpiobase = DEFAULT_GPIOBASE,
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.thermalbase = 0xfed08000,
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.system_type = 0, // 0 Mobile, 1 Desktop/Server
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.tseg_size = CONFIG_SMM_TSEG_SIZE,
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.spd_addresses = { 0xA0, 0x00,0xA4,0x00 },
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.ts_addresses = { 0x00, 0x00, 0x00, 0x00 },
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.ec_present = 1,
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.ddr3lv_support = 0,
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// 0 = leave channel enabled
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// 1 = disable dimm 0 on channel
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// 2 = disable dimm 1 on channel
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// 3 = disable dimm 0+1 on channel
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dimm_channel0_disabled: 2,
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dimm_channel1_disabled: 2,
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max_ddr3_freq: 1600,
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usb_port_config: {
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.dimm_channel0_disabled = 2,
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.dimm_channel1_disabled = 2,
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.max_ddr3_freq = 1600,
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.usb_port_config = {
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/* enabled usb oc pin length */
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{ 1, 0, 0x0040 }, /* P0: Right USB 3.0 #1 (no OC) */
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{ 1, 0, 0x0040 }, /* P1: Right USB 3.0 #2 (no OC) */
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@ -162,7 +162,7 @@ void main(unsigned long bist)
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{ 0, 4, 0x0000 }, /* P12: Empty */
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{ 0, 4, 0x0000 }, /* P13: Empty */
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},
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ddr_refresh_rate_config: 2, /* Force double refresh rate */
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.ddr_refresh_rate_config = 2, /* Force double refresh rate */
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};
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timestamp_init(get_initial_timestamp());
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