intel sandy/ivy: Skip SPD loading on S3 resume path
For S3 resume path SPD is only used for DIMM replacement detection. As this detection already fails in the case of removal/insertion of same DIMM, we can rely on cbmem_recovery() failure alone to force system reset in case someone accidentally does DIMM replacements while system is suspend-to-ram stage. Skipping DIMM replacement detection allows skipping slow SPD loading, thus reducing S3 resume path time by 80ms for every installed DIMM. Change-Id: I4f2838c05f172d3cb351b027c9b8dd6543ab5944 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17490 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -4235,22 +4235,21 @@ static void init_dram_ddr3(int mobile, int min_tck, int s3resume)
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ctrl_cached = (ramctr_timing *)mrc_cache->mrc_data;
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ctrl_cached = (ramctr_timing *)mrc_cache->mrc_data;
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}
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}
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if (!s3resume) {
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memset(spds, 0, sizeof(spds));
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memset(spds, 0, sizeof(spds));
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mainboard_get_spd(spds);
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mainboard_get_spd(spds);
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}
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/* verify MRC cache for fast boot */
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/* verify MRC cache for fast boot */
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if (ctrl_cached) {
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if (!s3resume && ctrl_cached) {
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/* check SPD CRC16 to make sure the DIMMs haven't been replaced */
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/* check SPD CRC16 to make sure the DIMMs haven't been replaced */
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fast_boot = verify_crc16_spds_ddr3(spds, ctrl_cached);
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fast_boot = verify_crc16_spds_ddr3(spds, ctrl_cached);
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if (!fast_boot)
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if (!fast_boot)
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printk(BIOS_DEBUG, "Stored timings CRC16 mismatch.\n");
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printk(BIOS_DEBUG, "Stored timings CRC16 mismatch.\n");
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if (!fast_boot && s3resume) {
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} else {
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/* Failed S3 resume, reset to come up cleanly */
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fast_boot = s3resume;
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outb(0x6, 0xcf9);
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halt();
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}
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}
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} else
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fast_boot = 0;
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if (fast_boot) {
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if (fast_boot) {
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printk(BIOS_DEBUG, "Trying stored timings.\n");
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printk(BIOS_DEBUG, "Trying stored timings.\n");
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