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src/[arch-lib]: change "unsigned" to "unsigned int" 

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ibb7b48a7a144421aff29acbb7ac30968ae5fe5ab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36329
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Martin Roth 2019-10-23 21:41:00 -06:00 committed by Martin Roth
parent e74ca4ffc2
commit 38ddbfb325
37 changed files with 157 additions and 157 deletions
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2
src/arch/arm/libgcc/udivmoddi4.c
View File

@ -17,7 +17,7 @@ uint64_t __udivmoddi4(uint64_t num, uint64_t den, uint64_t *rem_p)
{
uint64_t quot = 0, qbit = 1;
if (den == 0) {
return 1 / ((unsigned)den); /* Intentional divide by zero, without
return 1 / ((unsigned int)den); /* Intentional divide by zero, without
triggering a compiler warning which
would abort the build */
}

2
src/cpu/amd/family_10h-family_15h/fidvid.c
View File

@ -1042,7 +1042,7 @@ struct ap_apicid_st {
u8 apicid[NODE_NUMS * 4];
};
static void store_ap_apicid(unsigned ap_apicid, void *gp)
static void store_ap_apicid(unsigned int ap_apicid, void *gp)
{
struct ap_apicid_st *p = gp;

2
src/cpu/amd/family_10h-family_15h/init_cpus.h
View File

@ -26,7 +26,7 @@
#define NODE_MC(x) NODE_PCI(x,3)
#define NODE_LC(x) NODE_PCI(x,4)
unsigned int get_sbdn(unsigned bus);
unsigned int get_sbdn(unsigned int bus);
void cpuSetAMDMSR(uint8_t node_id);
typedef void (*process_ap_t) (u32 apicid, void *gp);

2
src/cpu/via/nano/microcode_blob.c
View File

@ -1,4 +1,4 @@
unsigned array[3588] =
unsigned int array[3588] =
{
#include "../../../../3rdparty/blobs/cpu/via/nano/microcode.h"
};

8
src/device/device_util.c
View File

@ -25,7 +25,7 @@
* @param apic_id The Local APIC ID number.
* @return Pointer to the device structure (if found), 0 otherwise.
*/
struct device *dev_find_lapic(unsigned apic_id)
struct device *dev_find_lapic(unsigned int apic_id)
{
struct device *dev;
struct device *result = NULL;
@ -325,7 +325,7 @@ void compact_resources(struct device *dev)
* @param index The index of the resource on the device.
* @return The resource, if it already exists.
*/
struct resource *probe_resource(const struct device *dev, unsigned index)
struct resource *probe_resource(const struct device *dev, unsigned int index)
{
struct resource *res;
@ -348,7 +348,7 @@ struct resource *probe_resource(const struct device *dev, unsigned index)
* @param index The index of the resource on the device.
* @return TODO.
*/
struct resource *new_resource(struct device *dev, unsigned index)
struct resource *new_resource(struct device *dev, unsigned int index)
{
struct resource *resource, *tail;
@ -395,7 +395,7 @@ struct resource *new_resource(struct device *dev, unsigned index)
* @param index The index of the resource on the device.
* return TODO.
*/
struct resource *find_resource(const struct device *dev, unsigned index)
struct resource *find_resource(const struct device *dev, unsigned int index)
{
struct resource *resource;

20
src/device/hypertransport.c
View File

@ -21,7 +21,7 @@
struct ht_link {
struct device *dev;
unsigned pos;
unsigned int pos;
unsigned char ctrl_off, config_off, freq_off, freq_cap_off;
};
@ -64,7 +64,7 @@ static struct device *ht_scan_get_devs(struct device **old_devices)
return first;
}
static int ht_setup_link(struct ht_link *prev, struct device *dev, unsigned pos)
static int ht_setup_link(struct ht_link *prev, struct device *dev, unsigned int pos)
{
struct ht_link cur[1];
int linkb_to_host;
@ -113,9 +113,9 @@ static int ht_setup_link(struct ht_link *prev, struct device *dev, unsigned pos)
return 0;
}
static unsigned ht_lookup_slave_capability(struct device *dev)
static unsigned int ht_lookup_slave_capability(struct device *dev)
{
unsigned pos;
unsigned int pos;
pos = 0;
do {
@ -135,7 +135,7 @@ static unsigned ht_lookup_slave_capability(struct device *dev)
}
static void ht_collapse_early_enumeration(struct bus *bus,
unsigned offset_unitid)
unsigned int offset_unitid)
{
unsigned int devfn;
struct ht_link prev;
@ -207,7 +207,7 @@ static void ht_collapse_early_enumeration(struct bus *bus,
for (devfn = PCI_DEVFN(1, 0); devfn <= 0xff; devfn += 8) {
struct device dummy;
u32 id;
unsigned pos, flags;
unsigned int pos, flags;
dummy.bus = bus;
dummy.path.type = DEVICE_PATH_PCI;
@ -236,10 +236,10 @@ static void ht_collapse_early_enumeration(struct bus *bus,
}
}
static unsigned int do_hypertransport_scan_chain(struct bus *bus, unsigned min_devfn,
unsigned max_devfn,
unsigned *ht_unitid_base,
unsigned offset_unitid)
static unsigned int do_hypertransport_scan_chain(struct bus *bus, unsigned int min_devfn,
unsigned int max_devfn,
unsigned int *ht_unitid_base,
unsigned int offset_unitid)
{
/*
* Even CONFIG_HT_CHAIN_UNITID_BASE == 0, we still can go through this

4
src/device/i2c.c
View File

@ -14,7 +14,7 @@
#include <device/i2c_simple.h>
#include <stdint.h>
int i2c_read_field(unsigned bus, uint8_t chip, uint8_t reg, uint8_t *data,
int i2c_read_field(unsigned int bus, uint8_t chip, uint8_t reg, uint8_t *data,
uint8_t mask, uint8_t shift)
{
int ret;
@ -28,7 +28,7 @@ int i2c_read_field(unsigned bus, uint8_t chip, uint8_t reg, uint8_t *data,
return ret;
}
int i2c_write_field(unsigned bus, uint8_t chip, uint8_t reg, uint8_t data,
int i2c_write_field(unsigned int bus, uint8_t chip, uint8_t reg, uint8_t data,
uint8_t mask, uint8_t shift)
{
int ret;

14
src/device/oprom/x86emu/decode.c
View File

@ -735,7 +735,7 @@ REMARKS:
Decodes scale/index of SIB byte and returns relevant offset part of
effective address.
****************************************************************************/
static unsigned decode_sib_si(
static unsigned int decode_sib_si(
int scale,
int index)
{
@ -785,7 +785,7 @@ Offset in memory for the address decoding
REMARKS:
Decodes SIB addressing byte and returns calculated effective address.
****************************************************************************/
static unsigned decode_sib_address(
static unsigned int decode_sib_address(
int mod)
{
int sib = fetch_byte_imm();
@ -874,10 +874,10 @@ NOTE: The code which specifies the corresponding segment (ds vs ss)
if a SS access is needed, set this bit. Otherwise, DS access
occurs (unless any of the segment override bits are set).
****************************************************************************/
unsigned decode_rm00_address(
unsigned int decode_rm00_address(
int rm)
{
unsigned offset;
unsigned int offset;
if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
/* 32-bit addressing */
@ -954,7 +954,7 @@ REMARKS:
Return the offset given by mod=01 addressing. Also enables the
decoding of instructions.
****************************************************************************/
unsigned decode_rm01_address(
unsigned int decode_rm01_address(
int rm)
{
int displacement;
@ -1043,7 +1043,7 @@ REMARKS:
Return the offset given by mod=10 addressing. Also enables the
decoding of instructions.
****************************************************************************/
unsigned decode_rm10_address(
unsigned int decode_rm10_address(
int rm)
{
if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
@ -1136,7 +1136,7 @@ REMARKS:
Return the offset given by "mod" addressing.
****************************************************************************/
unsigned decode_rmXX_address(int mod, int rm)
unsigned int decode_rmXX_address(int mod, int rm)
{
if (mod == 0)
return decode_rm00_address(rm);

8
src/device/oprom/x86emu/decode.h
View File

@ -76,10 +76,10 @@ u8* decode_rm_byte_register(int reg);
u16* decode_rm_word_register(int reg);
u32* decode_rm_long_register(int reg);
u16* decode_rm_seg_register(int reg);
unsigned decode_rm00_address(int rm);
unsigned decode_rm01_address(int rm);
unsigned decode_rm10_address(int rm);
unsigned decode_rmXX_address(int mod, int rm);
unsigned int decode_rm00_address(int rm);
unsigned int decode_rm01_address(int rm);
unsigned int decode_rm10_address(int rm);
unsigned int decode_rmXX_address(int mod, int rm);
#ifdef __cplusplus
} /* End of "C" linkage for C++ */

10
src/device/pci_device.c
View File

@ -345,7 +345,7 @@ static void pci_read_bases(struct device *dev, unsigned int howmany)
}
static void pci_record_bridge_resource(struct device *dev, resource_t moving,
unsigned index, unsigned long type)
unsigned int index, unsigned long type)
{
struct resource *resource;
unsigned long gran;
@ -1162,8 +1162,8 @@ unsigned int pci_match_simple_dev(struct device *dev, pci_devfn_t sdev)
* @param min_devfn Minimum devfn to look at in the scan, usually 0x00.
* @param max_devfn Maximum devfn to look at in the scan, usually 0xff.
*/
void pci_scan_bus(struct bus *bus, unsigned min_devfn,
unsigned max_devfn)
void pci_scan_bus(struct bus *bus, unsigned int min_devfn,
unsigned int max_devfn)
{
unsigned int devfn;
struct device *dev, **prev;
@ -1311,8 +1311,8 @@ static void pci_bridge_route(struct bus *link, scan_state state)
*/
void do_pci_scan_bridge(struct device *dev,
void (*do_scan_bus) (struct bus * bus,
unsigned min_devfn,
unsigned max_devfn))
unsigned int min_devfn,
unsigned int max_devfn))
{
struct bus *bus;

16
src/device/pciexp_device.c
View File

@ -45,7 +45,7 @@ unsigned int pciexp_find_extended_cap(struct device *dev, unsigned int cap)
* Re-train a PCIe link
*/
#define PCIE_TRAIN_RETRY 10000
static int pciexp_retrain_link(struct device *dev, unsigned cap)
static int pciexp_retrain_link(struct device *dev, unsigned int cap)
{
unsigned int try;
u16 lnk;
@ -90,8 +90,8 @@ static int pciexp_retrain_link(struct device *dev, unsigned cap)
* and enable Common Clock Configuration if possible. If CCC is
* enabled the link must be retrained.
*/
static void pciexp_enable_common_clock(struct device *root, unsigned root_cap,
struct device *endp, unsigned endp_cap)
static void pciexp_enable_common_clock(struct device *root, unsigned int root_cap,
struct device *endp, unsigned int endp_cap)
{
u16 root_scc, endp_scc, lnkctl;
@ -122,7 +122,7 @@ static void pciexp_enable_common_clock(struct device *root, unsigned root_cap,
}
}
static void pciexp_enable_clock_power_pm(struct device *endp, unsigned endp_cap)
static void pciexp_enable_clock_power_pm(struct device *endp, unsigned int endp_cap)
{
/* check if per port clk req is supported in device */
u32 endp_ca;
@ -328,8 +328,8 @@ static void pciexp_config_L1_sub_state(struct device *root, struct device *dev)
* by checking both root port and endpoint and returning
* the highest latency value.
*/
static int pciexp_aspm_latency(struct device *root, unsigned root_cap,
struct device *endp, unsigned endp_cap,
static int pciexp_aspm_latency(struct device *root, unsigned int root_cap,
struct device *endp, unsigned int endp_cap,
enum aspm_type type)
{
int root_lat = 0, endp_lat = 0;
@ -364,8 +364,8 @@ static int pciexp_aspm_latency(struct device *root, unsigned root_cap,
/*
* Enable ASPM on PCIe root port and endpoint.
*/
static void pciexp_enable_aspm(struct device *root, unsigned root_cap,
struct device *endp, unsigned endp_cap)
static void pciexp_enable_aspm(struct device *root, unsigned int root_cap,
struct device *endp, unsigned int endp_cap)
{
const char *aspm_type_str[] = { "None", "L0s", "L1", "L0s and L1" };
enum aspm_type apmc = PCIE_ASPM_NONE;

28
src/device/software_i2c.c
View File

@ -38,7 +38,7 @@ struct software_i2c_ops *software_i2c[SOFTWARE_I2C_MAX_BUS];
* Waits until either timeout_us have passed or (iff for_scl is set) until SCL
* goes high. Will report random line changes during the wait and return SCL.
*/
static int __wait(unsigned bus, int timeout_us, int for_scl)
static int __wait(unsigned int bus, int timeout_us, int for_scl)
{
int us;
int sda = software_i2c[bus]->get_sda(bus);
@ -63,13 +63,13 @@ static int __wait(unsigned bus, int timeout_us, int for_scl)
}
/* Waits the default DELAY_US to allow line state to stabilize. */
static void wait(unsigned bus)
static void wait(unsigned int bus)
{
__wait(bus, DELAY_US, 0);
}
/* Waits until SCL goes high. Prints a contextual error message on timeout. */
static int wait_for_scl(unsigned bus, const char *error_context)
static int wait_for_scl(unsigned int bus, const char *error_context)
{
if (!__wait(bus, TIMEOUT_US, 1)) {
printk(BIOS_ERR, "software_i2c(%d): ERROR: Clock stretching "
@ -80,7 +80,7 @@ static int wait_for_scl(unsigned bus, const char *error_context)
return 0;
}
static int start_cond(unsigned bus)
static int start_cond(unsigned int bus)
{
spew("software_i2c(%d): Sending start condition... ", bus);
@ -112,7 +112,7 @@ static int start_cond(unsigned bus)
return 0;
}
static int stop_cond(unsigned bus)
static int stop_cond(unsigned int bus)
{
spew("software_i2c(%d): Sending stop condition... ", bus);
@ -141,7 +141,7 @@ static int stop_cond(unsigned bus)
return 0;
}
static int out_bit(unsigned bus, int bit)
static int out_bit(unsigned int bus, int bit)
{
spew("software_i2c(%d): Sending a %d bit... ", bus, bit);
@ -174,7 +174,7 @@ static int out_bit(unsigned bus, int bit)
return 0;
}
static int in_bit(unsigned bus)
static int in_bit(unsigned int bus)
{
int bit;
@ -202,9 +202,9 @@ static int in_bit(unsigned bus)
}
/* Write a byte to I2C bus. Return 0 if ack by the slave. */
static int out_byte(unsigned bus, u8 byte)
static int out_byte(unsigned int bus, u8 byte)
{
unsigned bit;
unsigned int bit;
int nack, ret;
for (bit = 0; bit < 8; bit++)
@ -220,7 +220,7 @@ static int out_byte(unsigned bus, u8 byte)
return nack > 0 ? ERR_NACK : nack;
}
static int in_byte(unsigned bus, int ack)
static int in_byte(unsigned int bus, int ack)
{
u8 byte = 0;
int i, ret;
@ -241,7 +241,7 @@ static int in_byte(unsigned bus, int ack)
return byte;
}
int software_i2c_transfer(unsigned bus, struct i2c_msg *segments, int count)
int software_i2c_transfer(unsigned int bus, struct i2c_msg *segments, int count)
{
int i, ret;
struct i2c_msg *seg;
@ -269,7 +269,7 @@ int software_i2c_transfer(unsigned bus, struct i2c_msg *segments, int count)
return 0;
}
void software_i2c_wedge_ack(unsigned bus, u8 chip)
void software_i2c_wedge_ack(unsigned int bus, u8 chip)
{
int i;
@ -292,7 +292,7 @@ void software_i2c_wedge_ack(unsigned bus, u8 chip)
software_i2c[bus]->get_scl(bus));
}
void software_i2c_wedge_read(unsigned bus, u8 chip, u8 reg, int bits)
void software_i2c_wedge_read(unsigned int bus, u8 chip, u8 reg, int bits)
{
int i;
@ -321,7 +321,7 @@ void software_i2c_wedge_read(unsigned bus, u8 chip, u8 reg, int bits)
software_i2c[bus]->get_scl(bus));
}
void software_i2c_wedge_write(unsigned bus, u8 chip, u8 reg, int bits)
void software_i2c_wedge_write(unsigned int bus, u8 chip, u8 reg, int bits)
{
int i;

2
src/drivers/amd/agesa/s3_mtrr.c
View File

@ -19,7 +19,7 @@
#include <string.h>
#include <northbridge/amd/agesa/agesa_helper.h>
static void write_mtrr(u8 **p_nvram_pos, unsigned idx)
static void write_mtrr(u8 **p_nvram_pos, unsigned int idx)
{
msr_t msr_data;
msr_data = rdmsr(idx);

28
src/drivers/emulation/qemu/cirrus.c
View File

@ -197,23 +197,23 @@ write_hidden_dac (uint8_t data)
static void cirrus_init_linear_fb(struct device *dev)
{
uint8_t cr_ext, cr_overlay;
unsigned pitch = (width * 4) / VGA_CR_PITCH_DIVISOR;
unsigned int pitch = (width * 4) / VGA_CR_PITCH_DIVISOR;
uint8_t sr_ext = 0, hidden_dac = 0;
unsigned vdisplay_end = height - 2;
unsigned line_compare = 0x3ff;
unsigned int vdisplay_end = height - 2;
unsigned int line_compare = 0x3ff;
uint8_t overflow, cell_height_reg;
unsigned horizontal_end = width / VGA_CR_WIDTH_DIVISOR;
unsigned horizontal_total = horizontal_end + 40;
unsigned horizontal_blank_start = horizontal_end;
unsigned horizontal_sync_pulse_start = horizontal_end + 3;
unsigned horizontal_sync_pulse_end = 0;
unsigned int horizontal_end = width / VGA_CR_WIDTH_DIVISOR;
unsigned int horizontal_total = horizontal_end + 40;
unsigned int horizontal_blank_start = horizontal_end;
unsigned int horizontal_sync_pulse_start = horizontal_end + 3;
unsigned int horizontal_sync_pulse_end = 0;
unsigned horizontal_blank_end = 0;
unsigned vertical_blank_start = height + 1;
unsigned vertical_blank_end = 0;
unsigned vertical_sync_start = height + 3;
unsigned vertical_sync_end = 0;
unsigned vertical_total = height + 40;
unsigned int horizontal_blank_end = 0;
unsigned int vertical_blank_start = height + 1;
unsigned int vertical_blank_end = 0;
unsigned int vertical_sync_start = height + 3;
unsigned int vertical_sync_end = 0;
unsigned int vertical_total = height + 40;
/* find lfb pci bar */
addr = pci_read_config32(dev, PCI_BASE_ADDRESS_0);

6
src/drivers/generic/max98357a/chip.h
View File

@ -18,9 +18,9 @@ struct drivers_generic_max98357a_config {
struct acpi_gpio sdmode_gpio;
/* SDMODE Delay */
unsigned sdmode_delay;
unsigned int sdmode_delay;
/* GPIO used to indicate if this device is present */
unsigned device_present_gpio;
unsigned device_present_gpio_invert;
unsigned int device_present_gpio;
unsigned int device_present_gpio_invert;
};

2
src/drivers/i2c/at24rf08c/lenovo_serials.c
View File

@ -116,7 +116,7 @@ const char *smbios_mainboard_product_name(void)
void smbios_system_set_uuid(u8 *uuid)
{
static char result[16];
unsigned i;
unsigned int i;
static int already_read;
struct device *dev;
const int remap[16] = {

28
src/drivers/i2c/da7219/chip.h
View File

@ -25,13 +25,13 @@ struct drivers_i2c_da7219_config {
struct acpi_gpio irq_gpio;
/* I2C Bus Frequency in Hertz (default 400kHz) */
unsigned bus_speed;
unsigned int bus_speed;
/*
* micbias-lvl : Voltage (mV) for Mic Bias
* [<1600>, <1800>, <2000>, <2200>, <2400>, <2600>]
*/
unsigned micbias_lvl;
unsigned int micbias_lvl;
/*
* mic-amp-in-sel : Mic input source type
@ -47,30 +47,30 @@ struct drivers_i2c_da7219_config {
* micbias-pulse-lvl : Mic bias higher voltage pulse level (mV)
* [<2800>, <2900>]
*/
unsigned micbias_pulse_lvl;
unsigned int micbias_pulse_lvl;
/*
* micbias-pulse-time : Mic bias higher voltage pulse duration (ms)
*/
unsigned micbias_pulse_time;
unsigned int micbias_pulse_time;
/*
* btn-cfg : Periodic button press measurements for 4-pole jack (ms)
* [<2>, <5>, <10>, <50>, <100>, <200>, <500>]
*/
unsigned btn_cfg;
unsigned int btn_cfg;
/*
* mic-det-thr : Impedance threshold for mic detection measurement (Ohms)
* [<200>, <500>, <750>, <1000>]
*/
unsigned mic_det_thr;
unsigned int mic_det_thr;
/*
* jack-ins-deb : Debounce time for jack insertion (ms)
* [<5>, <10>, <20>, <50>, <100>, <200>, <500>, <1000>]
*/
unsigned jack_ins_deb;
unsigned int jack_ins_deb;
/*
* jack-det-rate : Jack type detection latency (3/4 pole)
@ -82,43 +82,43 @@ struct drivers_i2c_da7219_config {
* jack-rem-deb : Debounce time for jack removal (ms)
* [<1>, <5>, <10>, <20>]
*/
unsigned jack_rem_deb;
unsigned int jack_rem_deb;
/*
* a-d-btn-thr : Impedance threshold between buttons A and D
* [0x0 - 0xFF]
*/
unsigned a_d_btn_thr;
unsigned int a_d_btn_thr;
/*
* d-b-btn-thr : Impedance threshold between buttons D and B
* [0x0 - 0xFF]
*/
unsigned d_b_btn_thr;
unsigned int d_b_btn_thr;
/*
* b-c-btn-thr : Impedance threshold between buttons B and C
* [0x0 - 0xFF]
*/
unsigned b_c_btn_thr;
unsigned int b_c_btn_thr;
/*
* c-mic-btn-thr : Impedance threshold between button C and Mic
* [0x0 - 0xFF]
*/
unsigned c_mic_btn_thr;
unsigned int c_mic_btn_thr;
/*
* btn-avg : Number of 8-bit readings for averaged button measurement
* [<1>, <2>, <4>, <8>]
*/
unsigned btn_avg;
unsigned int btn_avg;
/*
* adc-1bit-rpt : Repeat count for 1-bit button measurement
* [<1>, <2>, <4>, <8>]
*/
unsigned adc_1bit_rpt;
unsigned int adc_1bit_rpt;
/*
* mclk-name : Pass the system clk to da7219

8
src/drivers/i2c/generic/chip.h
View File

@ -24,10 +24,10 @@ struct drivers_i2c_generic_config {
const char *cid; /* ACPI _CID */
const char *name; /* ACPI Device Name */
const char *desc; /* Device Description */
unsigned uid; /* ACPI _UID */
unsigned int uid; /* ACPI _UID */
enum i2c_speed speed; /* Bus speed in Hz, default is I2C_SPEED_FAST */
const char *compat_string; /* Compatible string for _HID=PRP0001 */
unsigned wake; /* Wake GPE */
unsigned int wake; /* Wake GPE */
struct acpi_irq irq; /* Interrupt */
/* Use GPIO based interrupt instead of PIRQ */
@ -43,8 +43,8 @@ struct drivers_i2c_generic_config {
int probed;
/* GPIO used to indicate if this device is present */
unsigned device_present_gpio;
unsigned device_present_gpio_invert;
unsigned int device_present_gpio;
unsigned int device_present_gpio_invert;
/* Disable reset and enable GPIO export in _CRS */
bool disable_gpio_export_in_crs;

30
src/drivers/i2c/nau8825/chip.h
View File

@ -24,19 +24,19 @@ struct drivers_i2c_nau8825_config {
struct acpi_irq irq;
/* I2C Bus Frequency in Hertz (default 400kHz) */
unsigned bus_speed;
unsigned int bus_speed;
/* Enable jack detection via JKDET pin */
unsigned jkdet_enable;
unsigned int jkdet_enable;
/* Enable JKDET pin pull if set, otherwise high impedance state */
unsigned jkdet_pull_enable;
unsigned int jkdet_pull_enable;
/* Pull-up JKDET pin if set, otherwise pull down */
unsigned jkdet_pull_up;
unsigned int jkdet_pull_up;
/* JKDET pin polarity, 0 => active high, 1 => active low */
unsigned jkdet_polarity;
unsigned int jkdet_polarity;
/*
* VREF Impedance selection
@ -45,10 +45,10 @@ struct drivers_i2c_nau8825_config {
* 2 - 125 kOhm
* 3 - 2.5 kOhm
*/
unsigned vref_impedance;
unsigned int vref_impedance;
/* Button impedance measurement hysteresis */
unsigned sar_hysteresis;
unsigned int sar_hysteresis;
/*
* Reference voltage for button impedance measurement and micbias
@ -61,8 +61,8 @@ struct drivers_i2c_nau8825_config {
* 6 - VDDA * 1.53
* 7 - VDDA * 1.53
*/
unsigned micbias_voltage;
unsigned sar_voltage;
unsigned int micbias_voltage;
unsigned int sar_voltage;
/*
* SAR compare time
@ -71,7 +71,7 @@ struct drivers_i2c_nau8825_config {
* 2 - 2 us
* 3 - 4 us
*/
unsigned sar_compare_time;
unsigned int sar_compare_time;
/*
* SAR sampling time
@ -80,7 +80,7 @@ struct drivers_i2c_nau8825_config {
* 2 - 8 us
* 3 - 16 us
*/
unsigned sar_sampling_time;
unsigned int sar_sampling_time;
/*
* Button short key press debounce time
@ -89,16 +89,16 @@ struct drivers_i2c_nau8825_config {
* 2 - 100 ms
* 3 - 30 ms
*/
unsigned short_key_debounce;
unsigned int short_key_debounce;
/* Debounce time 2^(n+2) ms (0-7) for jack insert */
unsigned jack_insert_debounce;
unsigned int jack_insert_debounce;
/* Debounce time 2^(n+2) ms (0-7) for jack eject */
unsigned jack_eject_debounce;
unsigned int jack_eject_debounce;
/* Number of buttons supported, up to 8 */
unsigned sar_threshold_num;
unsigned int sar_threshold_num;
/*
* Impedance threshold for each button, up to 8

16
src/drivers/i2c/ww_ring/ww_ring.c
View File

@ -88,12 +88,12 @@
* the program page size.
*/
typedef struct {
unsigned i2c_bus;
unsigned int i2c_bus;
uint8_t dev_addr;
uint8_t data_buffer[LP55231_PROG_PAGE_SIZE + 1];
} TiLp55231;
static void ww_ring_init(unsigned i2c_bus);
static void ww_ring_init(unsigned int i2c_bus);
/* Controller descriptors. */
static TiLp55231 lp55231s[WW_RING_NUM_LED_CONTROLLERS];
@ -142,7 +142,7 @@ static int ledc_transfer(TiLp55231 *ledc, struct i2c_msg *segs,
* bytes can be transmitted in one write transaction.
*/
static int ledc_write(TiLp55231 *ledc, uint8_t start_addr,
const uint8_t *data, unsigned count)
const uint8_t *data, unsigned int count)
{
struct i2c_msg seg;
@ -220,10 +220,10 @@ static int ledc_reset(TiLp55231 *ledc)
* into sections fitting into memory pages.
*/
static void ledc_write_program(TiLp55231 *ledc, uint8_t load_addr,
const uint8_t *program, unsigned count)
const uint8_t *program, unsigned int count)
{
uint8_t page_num = load_addr / LP55231_PROG_PAGE_SIZE;
unsigned page_offs = load_addr % LP55231_PROG_PAGE_SIZE;
unsigned int page_offs = load_addr % LP55231_PROG_PAGE_SIZE;
if ((load_addr + count) > LP55231_MAX_PROG_SIZE) {
printk(BIOS_WARNING,
@ -233,7 +233,7 @@ static void ledc_write_program(TiLp55231 *ledc, uint8_t load_addr,
}
while (count) {
unsigned segment_size = LP55231_PROG_PAGE_SIZE - page_offs;
unsigned int segment_size = LP55231_PROG_PAGE_SIZE - page_offs;
if (segment_size > count)
segment_size = count;
@ -334,7 +334,7 @@ static int ledc_init_validate(TiLp55231 *ledc)
* Find a program matching screen type, and run it on both controllers, if
* found.
*/
int ww_ring_display_pattern(unsigned i2c_bus, enum display_pattern pattern)
int ww_ring_display_pattern(unsigned int i2c_bus, enum display_pattern pattern)
{
static int initted;
const WwRingStateProg *wwr_prog;
@ -379,7 +379,7 @@ int ww_ring_display_pattern(unsigned i2c_bus, enum display_pattern pattern)
#define LP55231_I2C_BASE_ADDR 0x32
static void ww_ring_init(unsigned i2c_bus)
static void ww_ring_init(unsigned int i2c_bus)
{
TiLp55231 *ledc;
int i, count = 0;

2
src/drivers/i2c/ww_ring/ww_ring.h
View File

@ -30,6 +30,6 @@ enum display_pattern {
*
* Display pattern on the ring LEDs.
*/
int ww_ring_display_pattern(unsigned i2c_bus, enum display_pattern pattern);
int ww_ring_display_pattern(unsigned int i2c_bus, enum display_pattern pattern);
#endif

2
src/drivers/intel/gma/edid.c
View File

@ -27,7 +27,7 @@
static void wait_rdy(u8 *mmio)
{
unsigned try = 100;
unsigned int try = 100;
while (try--) {
if (read32(GMBUS2_ADDR) & GMBUS_HW_RDY)

2
src/drivers/net/chip.h
View File

@ -18,7 +18,7 @@
struct drivers_net_config {
uint16_t customized_leds;
unsigned wake; /* Wake pin for ACPI _PRW */
unsigned int wake; /* Wake pin for ACPI _PRW */
/*
* There maybe many NIC cards in a system.
* This parameter is for driver to identify what

2
src/drivers/parade/ps8625/ps8625.c
View File

@ -17,7 +17,7 @@
#include "ps8625.h"
void parade_ps8625_bridge_setup(unsigned bus, unsigned chip_base,
void parade_ps8625_bridge_setup(unsigned int bus, unsigned int chip_base,
const struct parade_write *parade_writes,
int parade_write_count)
{

2
src/drivers/parade/ps8625/ps8625.h
View File

@ -22,7 +22,7 @@ struct parade_write {
uint8_t val;
};
void parade_ps8625_bridge_setup(unsigned bus, unsigned chip_base,
void parade_ps8625_bridge_setup(unsigned int bus, unsigned int chip_base,
const struct parade_write *,
int parade_write_count);

2
src/drivers/pc80/pc/udelay_io.c
View File

@ -18,7 +18,7 @@ void init_timer(void)
{
}
void udelay(unsigned usecs)
void udelay(unsigned int usecs)
{
int i;

4
src/drivers/pc80/rtc/mc146818rtc_romcc.c
View File

@ -74,10 +74,10 @@ static inline __attribute__((unused)) int do_normal_boot(void)
return boot_use_normal(byte);
}
unsigned read_option_lowlevel(unsigned start, unsigned size, unsigned def)
unsigned int read_option_lowlevel(unsigned int start, unsigned int size, unsigned int def)
{
#if CONFIG(USE_OPTION_TABLE)
unsigned byte;
unsigned int byte;
byte = cmos_read(start/8);
return (byte >> (start & 7U)) & ((1U << size) - 1U);

2
src/drivers/pc80/tpm/tis.c
View File

@ -465,7 +465,7 @@ static u32 tis_senddata(const u8 *const data, u32 len)
burst = tpm_read_burst_count(locality);
while (1) {
unsigned count;
unsigned int count;
/* Wait till the device is ready to accept more data. */
while (!burst) {

6
src/drivers/spi/acpi/chip.h
View File

@ -21,11 +21,11 @@ struct drivers_spi_acpi_config {
const char *cid; /* ACPI _CID */
const char *name; /* ACPI Device Name */
const char *desc; /* Device Description */
unsigned uid; /* ACPI _UID */
unsigned speed; /* Bus speed in Hz (default 1MHz) */
unsigned int uid; /* ACPI _UID */
unsigned int speed; /* Bus speed in Hz (default 1MHz) */
const char *compat_string; /* Compatible string for _HID=PRP0001 */
struct acpi_irq irq; /* Interrupt */
unsigned wake; /* Wake GPE */
unsigned int wake; /* Wake GPE */
/* Use GPIO based interrupt instead of PIRQ */
struct acpi_gpio irq_gpio;

6
src/drivers/spi/tpm/tpm.c
View File

@ -103,7 +103,7 @@ static int tpm_sync(void)
*
* Returns 1 on success, 0 on failure (TPM SPI flow control timeout.)
*/
static int start_transaction(int read_write, size_t bytes, unsigned addr)
static int start_transaction(int read_write, size_t bytes, unsigned int addr)
{
spi_frame_header header;
uint8_t byte;
@ -291,7 +291,7 @@ static void read_bytes(void *buffer, size_t bytes)
*
* Returns one to indicate success, zero to indicate failure.
*/
static int tpm2_write_reg(unsigned reg_number, const void *buffer, size_t bytes)
static int tpm2_write_reg(unsigned int reg_number, const void *buffer, size_t bytes)
{
struct spi_slave *spi_slave = car_get_var_ptr(&g_spi_slave);
trace_dump("W", reg_number, bytes, buffer, 0);
@ -309,7 +309,7 @@ static int tpm2_write_reg(unsigned reg_number, const void *buffer, size_t bytes)
* Returns one to indicate success, zero to indicate failure. In case of
* failure zero out the user buffer.
*/
static int tpm2_read_reg(unsigned reg_number, void *buffer, size_t bytes)
static int tpm2_read_reg(unsigned int reg_number, void *buffer, size_t bytes)
{
struct spi_slave *spi_slave = car_get_var_ptr(&g_spi_slave);
if (!start_transaction(true, bytes, reg_number)) {

14
src/drivers/uart/uart8250io.c
View File

@ -29,30 +29,30 @@
#define SINGLE_CHAR_TIMEOUT (50 * 1000)
#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT)
static int uart8250_can_tx_byte(unsigned base_port)
static int uart8250_can_tx_byte(unsigned int base_port)
{
return inb(base_port + UART8250_LSR) & UART8250_LSR_THRE;
}
static void uart8250_tx_byte(unsigned base_port, unsigned char data)
static void uart8250_tx_byte(unsigned int base_port, unsigned char data)
{
unsigned long int i = SINGLE_CHAR_TIMEOUT;
while (i-- && !uart8250_can_tx_byte(base_port));
outb(data, base_port + UART8250_TBR);
}
static void uart8250_tx_flush(unsigned base_port)
static void uart8250_tx_flush(unsigned int base_port)
{
unsigned long int i = FIFO_TIMEOUT;
while (i-- && !(inb(base_port + UART8250_LSR) & UART8250_LSR_TEMT));
}
static int uart8250_can_rx_byte(unsigned base_port)
static int uart8250_can_rx_byte(unsigned int base_port)
{
return inb(base_port + UART8250_LSR) & UART8250_LSR_DR;
}
static unsigned char uart8250_rx_byte(unsigned base_port)
static unsigned char uart8250_rx_byte(unsigned int base_port)
{
unsigned long int i = SINGLE_CHAR_TIMEOUT;
while (i && !uart8250_can_rx_byte(base_port))
@ -64,7 +64,7 @@ static unsigned char uart8250_rx_byte(unsigned base_port)
return 0x0;
}
static void uart8250_init(unsigned base_port, unsigned divisor)
static void uart8250_init(unsigned int base_port, unsigned int divisor)
{
DISABLE_TRACE;
/* Disable interrupts */
@ -87,7 +87,7 @@ static void uart8250_init(unsigned base_port, unsigned divisor)
ENABLE_TRACE;
}
static const unsigned bases[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
static const unsigned int bases[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
uintptr_t uart_platform_base(int idx)
{

2
src/drivers/uart/uart8250mem.c
View File

@ -88,7 +88,7 @@ static unsigned char uart8250_mem_rx_byte(void *base)
return 0x0;
}
static void uart8250_mem_init(void *base, unsigned divisor)
static void uart8250_mem_init(void *base, unsigned int divisor)
{
/* Disable interrupts */
uart8250_write(base, UART8250_IER, 0x0);

8
src/drivers/usb/ehci_debug.c
View File

@ -109,7 +109,7 @@ static void dbgp_breath(void)
}
static int dbgp_wait_until_done(struct ehci_dbg_port *ehci_debug, struct dbgp_pipe *pipe,
unsigned ctrl, const int timeout)
unsigned int ctrl, const int timeout)
{
u32 rd_ctrl, rd_pids;
u32 ctrl_prev = 0, pids_prev = 0;
@ -312,7 +312,7 @@ void dbgp_mdelay(int ms)
}
}
int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype,
int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned int devnum, int requesttype,
int request, int value, int index, void *data, int size)
{
struct ehci_debug_info *info = dbgp_ehci_info();
@ -435,7 +435,7 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port)
static int usbdebug_init_(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info)
static int usbdebug_init_(unsigned int ehci_bar, unsigned int offset, struct ehci_debug_info *info)
{
struct ehci_caps *ehci_caps;
struct ehci_regs *ehci_regs;
@ -654,7 +654,7 @@ void dbgp_put(struct dbgp_pipe *pipe)
}
#if ENV_RAMSTAGE
void usbdebug_re_enable(unsigned ehci_base)
void usbdebug_re_enable(unsigned int ehci_base)
{
struct ehci_debug_info *dbg_info = dbgp_ehci_info();
u64 diff;

6
src/drivers/usb/ehci_debug.h
View File

@ -16,13 +16,13 @@
#include <types.h>
void usbdebug_re_enable(unsigned ehci_base);
void usbdebug_re_enable(unsigned int ehci_base);
void usbdebug_disable(void);
/* Returns 0 on success and sets MMIO base and dbg_offset if EHCI debug
* capability was found and enabled. Returns non-zero on error.
*/
int ehci_debug_hw_enable(unsigned *base, unsigned *dbg_offset);
int ehci_debug_hw_enable(unsigned int *base, unsigned int *dbg_offset);
void ehci_debug_select_port(unsigned int port);
#define DBGP_EP_VALID (1<<0)
@ -60,7 +60,7 @@ int dbgp_ep_is_active(struct dbgp_pipe *pipe);
int dbgp_bulk_write_x(struct dbgp_pipe *pipe, const char *bytes, int size);
int dbgp_bulk_read_x(struct dbgp_pipe *pipe, void *data, int size);
int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum,
int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned int devnum,
int requesttype, int request, int value, int index, void *data, int size);
void dbgp_mdelay(int ms);

6
src/drivers/xgi/common/vb_util.c
View File

@ -33,7 +33,7 @@ u8 xgifb_reg_get(unsigned long port, u8 index)
}
void xgifb_reg_and_or(unsigned long port, u8 index,
unsigned data_and, unsigned data_or)
unsigned int data_and, unsigned int data_or)
{
u8 temp;
@ -42,7 +42,7 @@ void xgifb_reg_and_or(unsigned long port, u8 index,
xgifb_reg_set(port, index, temp);
}
void xgifb_reg_and(unsigned long port, u8 index, unsigned data_and)
void xgifb_reg_and(unsigned long port, u8 index, unsigned int data_and)
{
u8 temp;
@ -51,7 +51,7 @@ void xgifb_reg_and(unsigned long port, u8 index, unsigned data_and)
xgifb_reg_set(port, index, temp);
}
void xgifb_reg_or(unsigned long port, u8 index, unsigned data_or)
void xgifb_reg_or(unsigned long port, u8 index, unsigned int data_or)
{
u8 temp;

6
src/drivers/xgi/common/vb_util.h
View File

@ -17,7 +17,7 @@
#define _VBUTIL_
extern void xgifb_reg_set(unsigned long, u8, u8);
extern u8 xgifb_reg_get(unsigned long, u8);
extern void xgifb_reg_or(unsigned long, u8, unsigned);
extern void xgifb_reg_and(unsigned long, u8, unsigned);
extern void xgifb_reg_and_or(unsigned long, u8, unsigned, unsigned);
extern void xgifb_reg_or(unsigned long, u8, unsigned int);
extern void xgifb_reg_and(unsigned long, u8, unsigned int);
extern void xgifb_reg_and_or(unsigned long, u8, unsigned int, unsigned int);
#endif

6
src/lib/fit.c
View File

@ -261,12 +261,12 @@ static void update_reserve_map(uint64_t start, uint64_t end,
}
struct entry_params {
unsigned addr_cells;
unsigned size_cells;
unsigned int addr_cells;
unsigned int size_cells;
void *data;
};
static uint64_t max_range(unsigned size_cells)
static uint64_t max_range(unsigned int size_cells)
{
/*
* Split up ranges who's sizes are too large to fit in #size-cells.