GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/samsung/stumpy: Convert to ASL 2.0 syntax 

Generated 'build/dsdt.dsl' files are same.

Change-Id: I0eda144f1a4f07ca82b3a799afcd8fc908419e69
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46215
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes HAOUAS 2020-10-08 10:10:38 +02:00 committed by Patrick Georgi
parent 50fcce54e0
commit 38eaf3e13f
2 changed files with 49 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
src/mainboard/samsung/stumpy/acpi/platform.asl
View File

@ -6,36 +6,36 @@
Method(_PTS,1)
{
Store (Zero, GP08) // Disable Bluetooth
GP08 = 0 // Disable Bluetooth
If (LEqual (Arg0, 3)) {
If (Arg0 == 3) {
// NVS has a flag to determine USB policy in S3
If (S3U0) {
Store (One, GP47) // Enable USB0
GP47 = 1 // Enable USB0
} Else {
Store (Zero, GP47) // Disable USB0
GP47 = 0 // Disable USB0
}
// NVS has a flag to determine USB policy in S3
If (S3U1) {
Store (One, GP56) // Enable USB1
GP56 = 1 // Enable USB1
} Else {
Store (Zero, GP56) // Disable USB1
GP56 = 0 // Disable USB1
}
}
If (LEqual (Arg0, 5)) {
If (Arg0 == 5) {
// NVS has a flag to determine USB policy in S5
If (S5U0) {
Store (One, GP47) // Enable USB0
GP47 = 1 // Enable USB0
} Else {
Store (Zero, GP47) // Disable USB0
GP47 = 0 // Disable USB0
}
// NVS has a flag to determine USB policy in S5
If (S5U1) {
Store (One, GP56) // Enable USB1
GP56 = 1 // Enable USB1
} Else {
Store (Zero, GP56) // Disable USB1
GP56 = 0 // Disable USB1
}
}
}
@ -66,5 +66,5 @@ IndexField (NVRI, NVRD, ByteAcc, NoLock, Preserve)
/* Disable USB Controller Reset in S3 (defaults to enabled) */
Method (USBR, 0, Serialized)
{
Store (USB_RESET_DISABLE_MAGIC, US3B)
US3B = USB_RESET_DISABLE_MAGIC
}

74
src/mainboard/samsung/stumpy/acpi/thermal.asl
View File

@ -20,10 +20,10 @@ Scope (\_TZ)
// Convert from Degrees C to 1/10 Kelvin for ACPI
Method (CTOK, 1) {
// 10th of Degrees C
Multiply (Arg0, 10, Local0)
Local0 = Arg0 * 10
// Convert to Kelvin
Add (Local0, 2732, Local0)
Local0 += 2732
Return (Local0)
}
@ -49,28 +49,28 @@ Scope (\_TZ)
Method (_TMP, 0, Serialized)
{
// Get CPU Temperature from PECI via SuperIO TMPIN3
Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN3, Local0)
Local0 = \_SB.PCI0.LPCB.SIO.ENVC.TIN3
// Check for invalid readings
If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) {
If ((Local0 == 255) || (Local0 == 0)) {
Return (CTOK (\F2ON))
}
// PECI raw value is an offset from Tj_max
Subtract (255, Local0, Local1)
Local1 = 255 - Local0
// Handle values greater than Tj_max
If (LGreaterEqual (Local1, \TMAX)) {
If (Local1 >= \TMAX) {
Return (CTOK (\TMAX))
}
// Subtract from Tj_max to get temperature
Subtract (\TMAX, Local1, Local0)
Local0 = \TMAX - Local1
Return (CTOK (Local0))
}
Method (_AC0) {
If (LLessEqual (\FLVL, 0)) {
If (\FLVL <= 0) {
Return (CTOK (\F0OF))
} Else {
Return (CTOK (\F0ON))
@ -78,7 +78,7 @@ Scope (\_TZ)
}
Method (_AC1) {
If (LLessEqual (\FLVL, 1)) {
If (\FLVL <= 1) {
Return (CTOK (\F1OF))
} Else {
Return (CTOK (\F1ON))
@ -86,7 +86,7 @@ Scope (\_TZ)
}
Method (_AC2) {
If (LLessEqual (\FLVL, 2)) {
If (\FLVL <= 2) {
Return (CTOK (\F2OF))
} Else {
Return (CTOK (\F2ON))
@ -94,7 +94,7 @@ Scope (\_TZ)
}
Method (_AC3) {
If (LLessEqual (\FLVL, 3)) {
If (\FLVL <= 3) {
Return (CTOK (\F3OF))
} Else {
Return (CTOK (\F3ON))
@ -102,7 +102,7 @@ Scope (\_TZ)
}
Method (_AC4) {
If (LLessEqual (\FLVL, 4)) {
If (\FLVL <= 4) {
Return (CTOK (\F4OF))
} Else {
Return (CTOK (\F4ON))
@ -118,20 +118,20 @@ Scope (\_TZ)
PowerResource (FNP0, 0, 0)
{
Method (_STA) {
If (LLessEqual (\FLVL, 0)) {
If (\FLVL <= 0) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
Store (0, \FLVL)
Store (\F0PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
\FLVL = 0
\_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F0PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (1, \FLVL)
Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
\FLVL = 1
\_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F1PW
Notify (\_TZ.THRM, 0x81)
}
}
@ -139,20 +139,20 @@ Scope (\_TZ)
PowerResource (FNP1, 0, 0)
{
Method (_STA) {
If (LLessEqual (\FLVL, 1)) {
If (\FLVL <= 1) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
Store (1, \FLVL)
Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
\FLVL = 1
\_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F1PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (2, \FLVL)
Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
\FLVL = 2
\_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F2PW
Notify (\_TZ.THRM, 0x81)
}
}
@ -160,20 +160,20 @@ Scope (\_TZ)
PowerResource (FNP2, 0, 0)
{
Method (_STA) {
If (LLessEqual (\FLVL, 2)) {
If (\FLVL <= 2) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
Store (2, \FLVL)
Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
\FLVL = 2
\_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F2PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (3, \FLVL)
Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
\FLVL = 3
\_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F3PW
Notify (\_TZ.THRM, 0x81)
}
}
@ -181,20 +181,20 @@ Scope (\_TZ)
PowerResource (FNP3, 0, 0)
{
Method (_STA) {
If (LLessEqual (\FLVL, 3)) {
If (\FLVL <= 3) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
Store (3, \FLVL)
Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
\FLVL = 3
\_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F3PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (4, \FLVL)
Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
\FLVL = 4
\_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F4PW
Notify (\_TZ.THRM, 0x81)
}
}
@ -202,20 +202,20 @@ Scope (\_TZ)
PowerResource (FNP4, 0, 0)
{
Method (_STA) {
If (LLessEqual (\FLVL, 4)) {
If (\FLVL <= 4) {
Return (One)
} Else {
Return (Zero)
}
}
Method (_ON) {
Store (4, \FLVL)
Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
\FLVL = 4
\_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F4PW
Notify (\_TZ.THRM, 0x81)
}
Method (_OFF) {
Store (4, \FLVL)
Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS)
\FLVL = 4
\_SB.PCI0.LPCB.SIO.ENVC.F3PS = \F4PW
Notify (\_TZ.THRM, 0x81)
}
}