janitor task: unify and cleanup naming.

cache_as_ram_auto.c and auto.c are both called "romstage.c" now.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/arch/i386/lib/console_print.c

@@ -63,7 +63,7 @@ static void __console_tx_string(int loglevel, const char *str)
 }
 
 /* Actually this should say defined(__ROMCC__) but that define is explicitly
- * set in some auto.c files to trigger the simple device_t version to be used.
+ * set in some romstage.c files to trigger the simple device_t version to be used.
  * So __GNUCC__ does the right thing here.
  */
 #if defined (__ROMCC__)

src/cpu/amd/dualcore/amd_sibling.c

@@ -78,7 +78,7 @@ unsigned get_apicid_base(unsigned ioapic_num)
 	nb_cfg_54 = read_nb_cfg_54();
 
 #if 0
-	//it is for all e0 single core and nc_cfg_54 low is set, but in the auto.c stage we do not set that bit for it.
+	//it is for all e0 single core and nc_cfg_54 low is set, but in the romstage.c stage we do not set that bit for it.
 	if(nb_cfg_54 && (!disable_siblings) && (siblings == 0)) {
 		//we need to check if e0 single core is there
 		int i;
@@ -109,7 +109,7 @@ unsigned get_apicid_base(unsigned ioapic_num)
 
 	if((apicid_base+ioapic_num-1)>0xf) {
 		// We need to enable APIC EXT ID
-		printk_info("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in auto.c so you can spare 16 id for ioapic\r\n");
+		printk_info("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in romstage.c so you can spare 16 id for ioapic\r\n");
 		enable_apic_ext_id(nodes);
 	}
 	

src/cpu/amd/model_10xxx/init_cpus.c

@@ -463,7 +463,7 @@ static void wait_all_core0_started(void)
  *  start the core0 in node, so it can generate HT packet to feature code.
  *
  * This function starts the AP nodes core0s. wait_all_core0_started() in
- * cache_as_ram_auto.c waits for all the AP to be finished before continuing
+ * romstage.c waits for all the AP to be finished before continuing
  * system init.
  */
 static void start_node(u8 node)

src/cpu/amd/sc520/raminit.c

@@ -89,7 +89,7 @@ void setupsc520(void)
 	/* as per the book: */
 	/* PAR register setup */
 	/* set up the PAR registers as they are on the MSM586SEG */
-	/*    moved to auto.c by Stepan, Ron says: */
+	/*    moved to romstage.c by Stepan, Ron says: */
 	/* NOTE: move this to mainboard.c ASAP */
 	setup_pars();
   

src/mainboard/Makefile.k8_CAR.inc

@@ -38,7 +38,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.d
 $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/Makefile.k8_ck804.inc

@@ -42,7 +42,7 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/southbridge/nvidia/ck804/romstrap.inc
 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -60,8 +60,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.d
 $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/Makefile.romccboard.inc

@@ -42,7 +42,7 @@ endif
 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc
 endif
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 ifeq ($(CONFIG_SSE),y)
 crt0s += $(src)/cpu/x86/sse_disable.inc
 endif
@@ -75,11 +75,11 @@ $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc: $(obj)/romcc $(src)/arch/i386/lib
 	$(obj)/romcc $(ROMCCFLAGS) --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
 
 ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h $(obj)/build.h
-	$(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h $(obj)/build.h
+	$(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 else
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/build.h
-	$(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+	$(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 endif
 
 endif

src/mainboard/amd/db800/Makefile.inc

@@ -11,7 +11,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -21,8 +21,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
 
 ifdef POST_EVALUATION
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/amd/dbm690t/Makefile.inc

@@ -38,7 +38,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
 $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/amd/norwich/Makefile.inc

@@ -12,7 +12,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
 
 ifdef POST_EVALUATION
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/amd/pistachio/Makefile.inc

@@ -38,7 +38,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
 $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/amd/serengeti_cheetah/Makefile.inc

@@ -44,7 +44,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -76,8 +76,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pc
 	perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' $(obj)/pci4.hex
 	mv $(obj)/pci4.hex $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc

@@ -43,7 +43,7 @@ initobj-y += crt0.o
 # FIXME in $(top)/Makefile
 crt0s := $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -78,8 +78,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/ssdt5.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pc
 	perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci5.hex
 	mv $(obj)/mainboard/$(MAINBOARDDIR)/pci5.hex $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/amd/serengeti_cheetah_fam10/spd_addr.h

@@ -19,7 +19,7 @@
 
 /**
  * This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
  */
 
 #define RC00 0

src/mainboard/artecgroup/dbe61/Makefile.inc

@@ -12,7 +12,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
 
 ifdef POST_EVALUATION
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/asus/a8n_e/Makefile.inc

@@ -35,7 +35,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -67,8 +67,8 @@ $(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
 	perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
 	mv pci4.hex ssdt4.c
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/asus/a8v-e_se/Makefile.inc

@@ -16,7 +16,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -34,8 +34,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
 $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/asus/m2v-mx_se/Makefile.inc

@@ -32,7 +32,7 @@ initobj-y += crt0.o
 # FIXME in $(top)/Makefile
 crt0s := $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -46,8 +46,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
 $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/bcom/winnetp680/Makefile.inc

@@ -39,7 +39,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/x86/fpu_enable.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 crt0s += $(src)/cpu/x86/mmx_disable.inc
 
 ifdef POST_EVALUATION
@@ -51,8 +51,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
 	iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
 	mv dsdt.hex $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/bcom/winnetp680/romstage.c

@@ -104,7 +104,7 @@ static void main(unsigned long bist)
 	uart_init();
 	console_init();
 
-	print_spew("In auto.c:main()\r\n");
+	print_spew("In romstage.c:main()\r\n");
 
 	enable_smbus();
 	smbus_fixup(&ctrl);
@@ -124,5 +124,5 @@ static void main(unsigned long bist)
 
 	/* ram_check(0, 640 * 1024); */
 
-	print_spew("Leaving auto.c:main()\r\n");
+	print_spew("Leaving romstage.c:main()\r\n");
 }

src/mainboard/digitallogic/msm800sev/Makefile.inc

@@ -12,7 +12,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
 
 ifdef POST_EVALUATION
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/digitallogic/msm800sev/auto.c

@@ -1,138 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
-#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "lib/ramtest.c"
-//#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/x86/bist.h"
-#include "cpu/x86/msr.h"
-#include <cpu/amd/lxdef.h>
-
-//#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-
-#include "southbridge/amd/cs5536/cs5536_early_smbus.c"
-#include "southbridge/amd/cs5536/cs5536_early_setup.c"
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
-        return smbus_read_byte(device, address);
-}
-
-#include "northbridge/amd/lx/raminit.h"
-
-static inline unsigned int fls(unsigned int x)
-{
-        int r;
-
-        __asm__("bsfl %1,%0\n\t"
-                "jnz 1f\n\t"
-                "movl $32,%0\n"
-                "1:" : "=r" (r) : "g" (x));
-        return r;
-}
-
-
-
-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
-{
-	/* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
-	 *                      component Banks (byte 17) * module banks, side (byte 5) *
-	 *                      width in bits (byte 6,7)
-	 *                    = Density per side (byte 31) * number of sides (byte 5) */
-	/* 1. Initialize GLMC registers base on SPD values, do one DIMM for now */
-	msr_t msr;
-	unsigned char module_banks, val;
-
-	
-	msr.hi = 0x10075012;
-	msr.lo = 0x00000040;
-	
-	wrmsr(MC_CF07_DATA, msr);		//GX3
-
-	/* timing and mode ... */
-
-	//msr = rdmsr(0x20000019);
-	
-	/* per standard bios settings */	
-/*
-	msr.hi = 0x18000108;
-	msr.lo = 
-			(6<<28) |		// cas_lat
-			(10<<24)|		// ref2act
-			(7<<20)|		// act2pre
-			(3<<16)|		// pre2act
-			(3<<12)|		// act2cmd
-			(2<<8)|			// act2act
-			(2<<6)|			// dplwr
-			(2<<4)|			// dplrd
-			(3);			// dal
-	* the msr value reported by quanta is very, very different. 
-	 * we will go with that value for now. 
-	 *
-	//msr.lo = 0x286332a3;
-*/
-	//wrmsr(0x20000019, msr);	//GX3
-
-}
-
-#include "northbridge/amd/lx/raminit.c"
-#include "lib/generic_sdram.c"
-
-/* CPU and GLIU mult/div */
-#define PLLMSRhi 0x0000039C
-/* Hold Count - how long we will sit in reset */
-#define PLLMSRlo 0x00DE0000
-
-#include "northbridge/amd/lx/pll_reset.c"
-#include "cpu/amd/model_lx/cpureginit.c"
-#include "cpu/amd/model_lx/syspreinit.c"
-static void msr_init(void)
-{
-
-	__builtin_wrmsr(0x10000020, 0xfff80, 0x20000000);
-        __builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000);
-
-        __builtin_wrmsr(0x40000020, 0xfff80, 0x20000000);
-        __builtin_wrmsr(0x40000021, 0x80fffe0, 0x20000000);
-}
-
-	
-static void main(unsigned long bist)
-{
-	static const struct mem_controller memctrl [] = {
-		{.channel0 = {(0xa<<3)|0, (0xa<<3)|1}}
-	};
-
-	SystemPreInit();			//GX3 OK
-
-	msr_init();					//GX3 OK
-
-	cs5536_early_setup();		//GX3 OK
-
-	/* NOTE: must do this AFTER the early_setup!
-	 * it is counting on some early MSR setup
-	 * for cs5536
-	 */
-	cs5536_setup_onchipuart();	//GX3 OK
-
-	uart_init();				//GX3 OK
-	console_init();				//GX3 OK
-
-	pll_reset();				//GX3 OK
-
-	cpuRegInit();				//GX3 OK
-
-	print_err("done cpuRegInit\n");
-	
-	sdram_initialize(1, memctrl);	//GX3 OK almost
-	
-	/* Check all of memory */
-	//ram_check(0x00000000, 640*1024);
-}

src/mainboard/digitallogic/msm800sev/romstage.c

@@ -98,7 +98,7 @@ void cache_as_ram_main(void)
 
 	/* Switch from Cache as RAM to real RAM */
 	/* There are two ways we could think about this.
-	 1. If we are using the auto.inc ROMCC way, the stack is going to be re-setup in the code following this code.
+	 1. If we are using the romstage.inc ROMCC way, the stack is going to be re-setup in the code following this code.
 		Just wbinvd the stack to clear the cache tags. We don't care where the stack used to be.
 	 2. This file is built as a normal .c -> .o and linked in etc. The stack might be used to return etc.
 		That means we care about what is in the stack. If we are smart we set the CAR stack to the same location

src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc

@@ -25,7 +25,7 @@ driver-y +=  mainboard.o
 obj-y += get_bus_conf.o
 obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
 obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
 obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
 
 # This is part of the conversion to init-obj and away from included code. 
@@ -35,7 +35,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -48,11 +48,11 @@ endif
 
 ifdef POST_EVALUATION
 
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/gigabyte/m57sli/Makefile.inc

@@ -25,7 +25,7 @@ driver-y +=  mainboard.o
 obj-y += get_bus_conf.o
 obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
 obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
 obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
 obj-$(CONFIG_GENERATE_ACPI_TABLES) +=  dsdt.o
 obj-$(CONFIG_GENERATE_ACPI_TABLES) +=  acpi_tables.o
@@ -39,7 +39,7 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc
 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -60,11 +60,11 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
 $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc

@@ -12,7 +12,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
 
 ifdef POST_EVALUATION
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/intel/d945gclf/Makefile.inc

@@ -41,7 +41,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -59,8 +59,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
 $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/intel/eagleheights/Makefile.inc

@@ -16,7 +16,7 @@ crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 # Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -33,8 +33,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.d
 $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/iwill/dk8_htx/Makefile.inc

@@ -44,7 +44,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -81,8 +81,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/ssdt5.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pc
 	perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' $(obj)/pci5.hex
 	mv $(obj)/pci5.hex $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/jetway/j7f24/Makefile.inc

@@ -35,13 +35,13 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/x86/fpu_enable.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 crt0s += $(src)/cpu/x86/mmx_disable.inc
 
 ifdef POST_EVALUATION
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/jetway/j7f24/romstage.c

@@ -106,7 +106,7 @@ static void main(unsigned long bist)
 	uart_init();
 	console_init();
 
-	print_spew("In auto.c:main()\r\n");
+	print_spew("In romstage.c:main()\r\n");
 
 	enable_smbus();
 	smbus_fixup(&ctrl);
@@ -126,5 +126,5 @@ static void main(unsigned long bist)
 
 	/* ram_check(0, 640 * 1024); */
 
-	print_spew("Leaving auto.c:main()\r\n");
+	print_spew("Leaving romstage.c:main()\r\n");
 }

src/mainboard/kontron/986lcd-m/Makefile.inc

@@ -40,7 +40,7 @@ initobj-y += crt0.o
 
 crt0s := $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -55,8 +55,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
 $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/kontron/986lcd-m/romstage.c

@@ -29,7 +29,7 @@
  * However, the Kontron 986LCD-M does not like unused clock signals to
  * be disabled. If other similar mainboard occur, it would make sense
  * to make this an entry in the sysinfo structure, and pre-initialize that
- * structure in the mainboard's auto.c main() function. For now a
+ * structure in the mainboard's romstage.c main() function. For now a
  * #define will do.
  */
 #define OVERRIDE_CLOCK_DISABLE 1

src/mainboard/kontron/kt690/Makefile.inc

@@ -38,7 +38,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@ $(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
 $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
 	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/lippert/roadrunner-lx/Makefile.inc

@@ -12,7 +12,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
 
 ifdef POST_EVALUATION
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/lippert/roadrunner-lx/romstage.c

@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/* Based on cache_as_ram_auto.c from AMD's DB800 and DBM690T mainboards. */
+/* Based on romstage.c from AMD's DB800 and DBM690T mainboards. */
 
 #define ASSEMBLY 1
 #define __PRE_RAM__

src/mainboard/lippert/spacerunner-lx/Makefile.inc

@@ -12,7 +12,7 @@ crt0s += $(src)/cpu/x86/32bit/entry32.inc
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 crt0s += $(src)/arch/i386/lib/id.inc
 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
 
 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
 
 ifdef POST_EVALUATION
 
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
-	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+	$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S  $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
 	perl -e 's/\.rodata/.rom.data/g' -pi $@
 	perl -e 's/\.text/.section .rom.text/g' -pi $@
 

src/mainboard/lippert/spacerunner-lx/romstage.c

@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/* Based on cache_as_ram_auto.c from AMD's DB800 and DBM690T mainboards. */
+/* Based on romstage.c from AMD's DB800 and DBM690T mainboards. */
 
 #define ASSEMBLY 1
 #define __PRE_RAM__