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mb/google/volteer: enable Early Command Training 

Update memory configuration on Tiger Lake platform to enable Early
Command Training. This feature was not supported before FSP v2527.

BUG=b:150357377
BRANCH=None
TEST= Build and boot volteer

Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: I674c30f4dfc1af6c0c4a460d66684545a190caf3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40023
Reviewed-by: Dossym Nurmukhanov <dossym@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Srinidhi N Kaushik 2020-04-01 12:22:00 -07:00 committed by Furquan Shaikh
parent 4ed96f2443
commit 3907a64a48
2 changed files with 2 additions and 2 deletions
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2
src/mainboard/google/volteer/variants/baseboard/memory.c
View File

@ -58,7 +58,7 @@ static const struct lpddr4x_cfg baseboard_memcfg = {
[7] = { 0, 1 }, /* DDR7_DQS[1:0] */ [7] = { 0, 1 }, /* DDR7_DQS[1:0] */
}, },
.ect = 0, /* Disable Early Command Training */ .ect = 1, /* Enable Early Command Training */
}; };
const struct lpddr4x_cfg *__weak variant_memory_params(void) const struct lpddr4x_cfg *__weak variant_memory_params(void)

2
src/mainboard/google/volteer/variants/malefor/memory.c
View File

@ -52,7 +52,7 @@ static const struct lpddr4x_cfg malefor_memcfg = {
[7] = { 0, 1 }, /* DDR7_DQS[1:0] */ [7] = { 0, 1 }, /* DDR7_DQS[1:0] */
}, },
.ect = 0, /* Disable Early Command Training */ .ect = 1, /* Enable Early Command Training */
}; };
const struct lpddr4x_cfg *variant_memory_params(void) const struct lpddr4x_cfg *variant_memory_params(void)