src/mb: Remove unused <console/console.h>

Change-Id: I6e0f33172fbcecebddfccdf64c22685636a23936
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50524
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/apple/macbook21/smihandler.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <soc/nvs.h>
 #include <southbridge/intel/common/pmutil.h>

src/mainboard/dell/optiplex_9010/smihandler.c

@@ -2,7 +2,6 @@
 
 #include <stdint.h>
 #include <arch/io.h>
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <superio/smsc/sch5545/sch5545.h>
 

src/mainboard/emulation/qemu-q35/romstage.c

@@ -2,7 +2,6 @@
 
 #include <arch/romstage.h>
 #include <cbmem.h>
-#include <console/console.h>
 #include <southbridge/intel/i82801ix/i82801ix.h>
 #include <device/pci_ops.h>
 

src/mainboard/google/auron/variants/auron_paine/spd/spd.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <endian.h>
 #include <string.h>
 #include <southbridge/intel/lynxpoint/lp_gpio.h>

src/mainboard/google/auron/variants/auron_yuna/spd/spd.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <endian.h>
 #include <string.h>
 #include <southbridge/intel/lynxpoint/lp_gpio.h>

src/mainboard/google/auron/variants/gandof/spd/spd.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <endian.h>
 #include <string.h>
 #include <southbridge/intel/lynxpoint/lp_gpio.h>

src/mainboard/google/auron/variants/lulu/spd/spd.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <endian.h>
 #include <string.h>
 #include <southbridge/intel/lynxpoint/lp_gpio.h>

src/mainboard/google/auron/variants/samus/spd/spd.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <endian.h>
 #include <string.h>
 #include <southbridge/intel/lynxpoint/lp_gpio.h>

src/mainboard/google/dedede/romstage.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <baseboard/variants.h>
-#include <console/console.h>
 #include <ec/google/chromeec/ec.h>
 #include <gpio.h>
 #include <memory_info.h>

src/mainboard/google/dedede/variants/drawcia/gpio.c

@@ -3,7 +3,6 @@
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
 #include <fw_config.h>
-#include <console/console.h>
 #include <ec/google/chromeec/ec.h>
 
 /* Pad configuration in ramstage*/

src/mainboard/google/fizz/variants/endeavour/board.c

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
+
 #include <baseboard/variants.h>
-#include <console/console.h>
 #include <nhlt.h>
 #include <soc/nhlt.h>
 

src/mainboard/google/hatch/romstage_spd_cbfs.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <baseboard/variants.h>
-#include <console/console.h>
 #include <ec/google/chromeec/ec.h>
 #include <gpio.h>
 #include <memory_info.h>

src/mainboard/google/zork/smihandler.c

@@ -8,7 +8,6 @@
 #include <soc/smi.h>
 #include <variant/ec.h>
 #include <variant/gpio.h>
-#include <console/console.h>
 
 void mainboard_smi_gpi(u32 gpi_sts)
 {

src/mainboard/google/zork/variants/dirinboz/variant.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <baseboard/variants.h>
-#include <console/console.h>
 #include <device/device.h>
 #include <drivers/i2c/generic/chip.h>
 #include <soc/pci_devs.h>

src/mainboard/google/zork/variants/gumboz/variant.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <baseboard/variants.h>
-#include <console/console.h>
 #include <device/device.h>
 #include <drivers/i2c/generic/chip.h>
 #include <soc/pci_devs.h>

src/mainboard/intel/dcp847ske/early_southbridge.c

@@ -3,7 +3,6 @@
 #include <bootblock_common.h>
 #include <stdint.h>
 #include <cf9_reset.h>
-#include <console/console.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 

src/mainboard/intel/elkhartlake_crb/romstage_fsp_params.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <baseboard/variants.h>
-#include <console/console.h>
 #include <soc/meminit.h>
 #include <soc/romstage.h>
 

src/mainboard/intel/jasperlake_rvp/romstage_fsp_params.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <baseboard/variants.h>
-#include <console/console.h>
 #include <soc/meminit.h>
 #include <soc/romstage.h>
 #include "board_id.h"

src/mainboard/packardbell/ms2290/smihandler.c

@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <device/pci_ops.h>
 #include <southbridge/intel/common/pmutil.h>

src/mainboard/pcengines/apu2/romstage.c

@@ -2,7 +2,6 @@
 
 #include <stdint.h>
 #include <amdblocks/acpimmio.h>
-#include <console/console.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
 #include <gpio.h>

src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <bootstate.h>
-#include <console/console.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <gpio.h>

src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <bootstate.h>
-#include <console/console.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>

src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c

@@ -3,7 +3,6 @@
 #include <arch/io.h>
 #include <bootstate.h>
 #include <cf9_reset.h>
-#include <console/console.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>

src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c

@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <bootstate.h>
-#include <console/console.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>

src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c

@@ -3,7 +3,6 @@
 #include <arch/io.h>
 #include <bootstate.h>
 #include <cf9_reset.h>
-#include <console/console.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>