Drop CONFIG_AP_CODE_IN_CAR
This option has not been enabled on any board and was considered obsolete last time it was touched. If we need the functionality, let's fix this in a generic way instead of a K8 specific way. This was mostly a speedup hack back in the day. Change-Id: Ib1ca248c56a7f6e9d0c986c35d131d5f444de0d8 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/3211 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
This commit is contained in:
Stefan Reinauer
Stefan Reinauer
parent
648d16679c
commit
3949e37834
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@ -943,10 +943,6 @@ config DEBUG_COVERAGE
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endmenu
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endmenu
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# These probably belong somewhere else, but they are needed somewhere.
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# These probably belong somewhere else, but they are needed somewhere.
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config AP_CODE_IN_CAR
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bool
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default n
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config RAMINIT_SYSINFO
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config RAMINIT_SYSINFO
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bool
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bool
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default n
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default n
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@ -48,9 +48,6 @@ endif
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ifeq ($(CONFIG_PAYLOAD_FILO),y)
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ifeq ($(CONFIG_PAYLOAD_FILO),y)
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COREBOOT_ROM_DEPENDENCIES+=filo
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COREBOOT_ROM_DEPENDENCIES+=filo
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endif
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endif
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ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
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COREBOOT_ROM_DEPENDENCIES+=$(objcbfs)/coreboot_ap.elf
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endif
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extract_nth=$(word $(1), $(subst |, ,$(2)))
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extract_nth=$(word $(1), $(subst |, ,$(2)))
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@ -79,10 +76,6 @@ endif
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$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) $$(VBOOT_STUB_ELF)
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$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) $$(VBOOT_STUB_ELF)
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@printf " CBFS $(subst $(obj)/,,$(@))\n"
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@printf " CBFS $(subst $(obj)/,,$(@))\n"
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cp $(obj)/coreboot.pre $@.tmp
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cp $(obj)/coreboot.pre $@.tmp
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if [ -f $(objcbfs)/coreboot_ap.elf ]; \
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then \
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$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/coreboot_ap.elf -n $(CONFIG_CBFS_PREFIX)/coreboot_ap -c $(CBFS_COMPRESS_FLAG); \
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fi
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$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/coreboot_ram.elf -n $(CONFIG_CBFS_PREFIX)/coreboot_ram -c $(CBFS_COMPRESS_FLAG)
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$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/coreboot_ram.elf -n $(CONFIG_CBFS_PREFIX)/coreboot_ram -c $(CBFS_COMPRESS_FLAG)
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ifeq ($(CONFIG_PAYLOAD_NONE),y)
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ifeq ($(CONFIG_PAYLOAD_NONE),y)
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@printf " PAYLOAD none (as specified by user)\n"
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@printf " PAYLOAD none (as specified by user)\n"
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@ -187,17 +180,6 @@ else
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$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
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$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
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endif
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endif
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################################################################################
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# Ramstage for AP CPU (AMD K8, obsolete?)
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$(objcbfs)/coreboot_ap.debug: $(objgenerated)/coreboot_ap.o $(src)/arch/x86/init/ldscript_apc.lb
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $<
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$(objgenerated)/coreboot_ap.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@
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################################################################################
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################################################################################
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# done
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# done
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@ -1,31 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Advanced Micro Devices, Inc.
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* Copyright (C) 2008-2010 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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INCLUDE "ldoptions"
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SECTIONS
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{
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.apcrom . : {
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_apcrom = .;
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*(.text)
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*(.rodata)
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*(.rodata.*)
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_eapcrom = .;
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}
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}
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@ -44,10 +44,3 @@ void asmlinkage copy_and_run(void)
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{
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{
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cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_ram");
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cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_ram");
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}
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}
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#if CONFIG_AP_CODE_IN_CAR
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void asmlinkage copy_and_run_ap_code_in_car(unsigned ret_addr)
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{
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cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_ap", ret_addr);
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}
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#endif
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@ -17,7 +17,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_PIRQ_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select HAVE_MP_TABLE
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select LIFT_BSP_APIC_ID
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select LIFT_BSP_APIC_ID
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#select AP_CODE_IN_CAR
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select WAIT_BEFORE_CPUS_INIT
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select WAIT_BEFORE_CPUS_INIT
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_TABLES
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@ -1,74 +0,0 @@
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#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
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#include <stdint.h>
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#include <device/pci_def.h>
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#include <device/pci_ids.h>
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#include <arch/io.h>
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#include <device/pnp_def.h>
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#include <cpu/x86/lapic.h>
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#include <pc80/mc146818rtc.h>
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#include "console/console.c"
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#include "lib/uart8250.c"
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#include "console/vtxprintf.c"
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#include <cpu/amd/model_fxx_rev.h>
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#include "northbridge/amd/amdk8/raminit.h"
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#include "lib/delay.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
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#include "northbridge/amd/amdk8/amdk8_f.h"
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#include "cpu/x86/mtrr.h"
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#include "cpu/amd/mtrr.h"
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#include "cpu/x86/tsc.h"
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#include "northbridge/amd/amdk8/amdk8_f_pci.c"
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#include "northbridge/amd/amdk8/raminit_f_dqs.c"
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static inline unsigned get_nodes(void)
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{
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return ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60)>>4) & 7) + 1;
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}
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#include "cpu/amd/dualcore/dualcore.c"
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void hardwaremain(int ret_addr)
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{
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struct sys_info *sysinfo = &sysinfo_car; // in CACHE
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struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
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struct node_core_id id;
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id = get_node_core_id_x();
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printk(BIOS_DEBUG, "CODE IN CACHE ON NODE: %02x\n", id.nodeid);
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train_ram(id.nodeid, sysinfo, sysinfox);
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/*
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* go back, but can not use stack any more, because we
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* only keep ret_addr and can not restore esp, and ebp.
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*/
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__asm__ volatile (
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"movl %0, %%edi\n\t"
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"jmp *%%edi\n\t"
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:: "a"(ret_addr)
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);
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}
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#include <arch/registers.h>
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void x86_exception(struct eregs *info)
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{
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do {
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hlt();
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} while(1);
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}
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@ -1,99 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 AMD
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* Written by Yinghai Lu <yinghailu@amd.com> for AMD.
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* Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS)
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* Written by Morgan Tsai <my_tsai@sis.com> for SiS.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
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#include <stdint.h>
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#include <device/pci_def.h>
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#include <device/pci_ids.h>
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#include <arch/io.h>
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#include <device/pnp_def.h>
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#include <cpu/x86/lapic.h>
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#include <pc80/mc146818rtc.h>
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#include "lib/uart8250.c"
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#include "arch/x86/lib/printk_init.c"
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#include "console/vtxprintf.c"
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#include "console/console.c"
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#include <cpu/amd/model_fxx_rev.h>
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#include "northbridge/amd/amdk8/raminit.h"
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#include "lib/delay.c"
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//#include "cpu/x86/lapic/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "southbridge/sis/sis966/sis966_early_ctrl.c"
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#include "northbridge/amd/amdk8/amdk8_f.h"
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#include "cpu/x86/mtrr.h"
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#include "cpu/amd/mtrr.h"
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#include "cpu/x86/tsc.h"
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#include "northbridge/amd/amdk8/amdk8_f_pci.c"
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#include "northbridge/amd/amdk8/raminit_f_dqs.c"
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#include "cpu/amd/dualcore/dualcore.c"
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void hardwaremain(int ret_addr)
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{
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struct sys_info *sysinfo = &sysinfo_car; // in CACHE
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struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
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struct node_core_id id;
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id = get_node_core_id_x();
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//FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP
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print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
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train_ram(id.nodeid, sysinfo, sysinfox);
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/*
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go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp
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*/
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__asm__ volatile (
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"movl %0, %%edi\n\t"
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"jmp *%%edi\n\t"
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:: "a"(ret_addr)
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);
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}
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#include <arch/registers.h>
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void x86_exception(struct eregs *info)
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{
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do {
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hlt();
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} while(1);
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}
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@ -1,97 +0,0 @@
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/*
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* This file is part of the coreboot project.
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|
||||||
*
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|
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* Copyright (C) 2007 AMD
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|
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* Written by Yinghai Lu <yinghailu@amd.com> for AMD.
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|
||||||
*
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|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
||||||
*/
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|
||||||
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|
||||||
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
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#include <stdint.h>
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#include <device/pci_def.h>
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||||||
#include <device/pci_ids.h>
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||||||
#include <arch/io.h>
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#include <device/pnp_def.h>
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||||||
#include <cpu/x86/lapic.h>
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#include <pc80/mc146818rtc.h>
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#include "lib/uart8250.c"
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#include "arch/x86/lib/printk_init.c"
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#include "console/vtxprintf.c"
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#include "console/console.c"
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#include <cpu/amd/model_fxx_rev.h>
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#include "northbridge/amd/amdk8/raminit.h"
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#include "lib/delay.c"
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//#include "cpu/x86/lapic/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
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#include "northbridge/amd/amdk8/amdk8_f.h"
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#include "cpu/x86/mtrr.h"
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#include "cpu/amd/mtrr.h"
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||||||
#include "cpu/x86/tsc.h"
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||||||
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#include "northbridge/amd/amdk8/amdk8_f_pci.c"
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||||||
#include "northbridge/amd/amdk8/raminit_f_dqs.c"
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|
||||||
#include "cpu/amd/dualcore/dualcore.c"
|
|
||||||
|
|
||||||
void hardwaremain(int ret_addr)
|
|
||||||
{
|
|
||||||
struct sys_info *sysinfo = &sysinfo_car; // in CACHE
|
|
||||||
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
|
|
||||||
|
|
||||||
struct node_core_id id;
|
|
||||||
|
|
||||||
id = get_node_core_id_x();
|
|
||||||
|
|
||||||
//FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP
|
|
||||||
print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
|
|
||||||
|
|
||||||
train_ram(id.nodeid, sysinfo, sysinfox);
|
|
||||||
|
|
||||||
/*
|
|
||||||
go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp
|
|
||||||
*/
|
|
||||||
|
|
||||||
__asm__ volatile (
|
|
||||||
"movl %0, %%edi\n\t"
|
|
||||||
"jmp *%%edi\n\t"
|
|
||||||
:: "a"(ret_addr)
|
|
||||||
);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
#include <arch/registers.h>
|
|
||||||
|
|
||||||
void x86_exception(struct eregs *info)
|
|
||||||
{
|
|
||||||
do {
|
|
||||||
hlt();
|
|
||||||
} while(1);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -1,82 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is part of the coreboot project.
|
|
||||||
*
|
|
||||||
* Copyright (C) 2007 AMD
|
|
||||||
* (Written by Yinghai Lu <yinghailu@amd.com> for AMD)
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
|
|
||||||
|
|
||||||
#include <stdint.h>
|
|
||||||
#include <device/pci_def.h>
|
|
||||||
#include <device/pci_ids.h>
|
|
||||||
#include <arch/io.h>
|
|
||||||
#include <device/pnp_def.h>
|
|
||||||
#include <cpu/x86/lapic.h>
|
|
||||||
#include <pc80/mc146818rtc.h>
|
|
||||||
#include "lib/uart8259.c"
|
|
||||||
|
|
||||||
#include "console/console.c"
|
|
||||||
#include <cpu/amd/model_fxx_rev.h>
|
|
||||||
#include "northbridge/amd/amdk8/raminit.h"
|
|
||||||
#include "lib/delay.c"
|
|
||||||
/* #include "cpu/x86/lapic/boot_cpu.c" */
|
|
||||||
#include "northbridge/amd/amdk8/reset_test.c"
|
|
||||||
#include "northbridge/amd/amdk8/debug.c"
|
|
||||||
#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
|
|
||||||
#include "northbridge/amd/amdk8/amdk8_f.h"
|
|
||||||
#include "cpu/x86/mtrr.h"
|
|
||||||
#include "cpu/amd/mtrr.h"
|
|
||||||
#include "cpu/x86/tsc.h"
|
|
||||||
#include "northbridge/amd/amdk8/amdk8_f_pci.c"
|
|
||||||
#include "northbridge/amd/amdk8/raminit_f_dqs.c"
|
|
||||||
#include "cpu/amd/dualcore/dualcore.c"
|
|
||||||
|
|
||||||
void hardwaremain(int ret_addr)
|
|
||||||
{
|
|
||||||
struct sys_info *sysinfo = &sysinfo_car; /* in CACHE */
|
|
||||||
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); /* in RAM */
|
|
||||||
struct node_core_id id;
|
|
||||||
|
|
||||||
id = get_node_core_id_x();
|
|
||||||
|
|
||||||
/* FIXME: For USBDEBUG you need to make sure dbg_info gets
|
|
||||||
* assigned in AP.
|
|
||||||
*/
|
|
||||||
print_debug("CODE IN CACHE ON NODE:");
|
|
||||||
print_debug_hex8(id.nodeid);
|
|
||||||
print_debug("\n");
|
|
||||||
|
|
||||||
train_ram(id.nodeid, sysinfo, sysinfox);
|
|
||||||
|
|
||||||
/* Go back, but cannot use stack any more, because we only
|
|
||||||
* keep ret_addr and can not restore esp, and ebp.
|
|
||||||
*/
|
|
||||||
__asm__ __volatile__(
|
|
||||||
"movl %0, %%edi\n\t"
|
|
||||||
"jmp *%%edi\n\t"
|
|
||||||
: : "a" (ret_addr)
|
|
||||||
);
|
|
||||||
}
|
|
||||||
|
|
||||||
#include <arch/registers.h>
|
|
||||||
|
|
||||||
void x86_exception(struct eregs *info)
|
|
||||||
{
|
|
||||||
while (1)
|
|
||||||
hlt();
|
|
||||||
}
|
|
||||||
|
|
@ -1,91 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is part of the coreboot project.
|
|
||||||
*
|
|
||||||
* Copyright (C) 2007 AMD
|
|
||||||
* Written by Yinghai Lu <yinghailu@amd.com> for AMD.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
|
|
||||||
|
|
||||||
#include <stdint.h>
|
|
||||||
#include <device/pci_def.h>
|
|
||||||
#include <device/pci_ids.h>
|
|
||||||
#include <arch/io.h>
|
|
||||||
#include <device/pnp_def.h>
|
|
||||||
#include <cpu/x86/lapic.h>
|
|
||||||
#include <pc80/mc146818rtc.h>
|
|
||||||
#include "lib/uart8250.c"
|
|
||||||
#include "arch/x86/lib/printk_init.c"
|
|
||||||
#include "console/vtxprintf.c"
|
|
||||||
#include "console/console.c"
|
|
||||||
|
|
||||||
#include <cpu/amd/model_fxx_rev.h>
|
|
||||||
#include "northbridge/amd/amdk8/raminit.h"
|
|
||||||
|
|
||||||
#include "lib/delay.c"
|
|
||||||
|
|
||||||
#include "northbridge/amd/amdk8/reset_test.c"
|
|
||||||
|
|
||||||
#include "northbridge/amd/amdk8/debug.c"
|
|
||||||
|
|
||||||
#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
|
|
||||||
|
|
||||||
#include "northbridge/amd/amdk8/amdk8_f.h"
|
|
||||||
|
|
||||||
#include "cpu/x86/mtrr.h"
|
|
||||||
#include "cpu/amd/mtrr.h"
|
|
||||||
#include "cpu/x86/tsc.h"
|
|
||||||
|
|
||||||
#include "northbridge/amd/amdk8/amdk8_f_pci.c"
|
|
||||||
#include "northbridge/amd/amdk8/raminit_f_dqs.c"
|
|
||||||
|
|
||||||
#include "cpu/amd/dualcore/dualcore.c"
|
|
||||||
|
|
||||||
void hardwaremain(int ret_addr)
|
|
||||||
{
|
|
||||||
struct sys_info *sysinfo = &sysinfo_car; // in CACHE
|
|
||||||
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
|
|
||||||
|
|
||||||
struct node_core_id id;
|
|
||||||
|
|
||||||
id = get_node_core_id_x();
|
|
||||||
|
|
||||||
//FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP
|
|
||||||
print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
|
|
||||||
|
|
||||||
train_ram(id.nodeid, sysinfo, sysinfox);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* go back, but can not use stack any more, because we only keep
|
|
||||||
* ret_addr and can not restore esp, and ebp
|
|
||||||
*/
|
|
||||||
|
|
||||||
__asm__ volatile (
|
|
||||||
"movl %0, %%edi\n\t"
|
|
||||||
"jmp *%%edi\n\t"
|
|
||||||
:: "a"(ret_addr)
|
|
||||||
);
|
|
||||||
}
|
|
||||||
|
|
||||||
#include <arch/registers.h>
|
|
||||||
|
|
||||||
void x86_exception(struct eregs *info)
|
|
||||||
{
|
|
||||||
do {
|
|
||||||
hlt();
|
|
||||||
} while(1);
|
|
||||||
}
|
|
||||||
|
|
@ -15,7 +15,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
|
||||||
select HAVE_OPTION_TABLE
|
select HAVE_OPTION_TABLE
|
||||||
select HAVE_PIRQ_TABLE
|
select HAVE_PIRQ_TABLE
|
||||||
select HAVE_MP_TABLE
|
select HAVE_MP_TABLE
|
||||||
#select AP_CODE_IN_CAR
|
|
||||||
select LIFT_BSP_APIC_ID
|
select LIFT_BSP_APIC_ID
|
||||||
select BOARD_ROMSIZE_KB_1024
|
select BOARD_ROMSIZE_KB_1024
|
||||||
select RAMINIT_SYSINFO
|
select RAMINIT_SYSINFO
|
||||||
|
|
|
||||||
|
|
@ -1,97 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is part of the coreboot project.
|
|
||||||
*
|
|
||||||
* Copyright (C) 2007 AMD
|
|
||||||
* Written by Yinghai Lu <yinghailu@amd.com> for AMD.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
|
|
||||||
|
|
||||||
#include <stdint.h>
|
|
||||||
#include <device/pci_def.h>
|
|
||||||
#include <device/pci_ids.h>
|
|
||||||
#include <arch/io.h>
|
|
||||||
#include <device/pnp_def.h>
|
|
||||||
#include <cpu/x86/lapic.h>
|
|
||||||
#include <pc80/mc146818rtc.h>
|
|
||||||
|
|
||||||
#include "console/console.c"
|
|
||||||
#include "lib/uart8250.c"
|
|
||||||
#include "console/vtxprintf.c"
|
|
||||||
#include "./arch/x86/lib/printk_init.c"
|
|
||||||
|
|
||||||
#include <cpu/amd/model_fxx_rev.h>
|
|
||||||
#include "northbridge/amd/amdk8/raminit.h"
|
|
||||||
|
|
||||||
#include "lib/delay.c"
|
|
||||||
|
|
||||||
//#include "cpu/x86/lapic/boot_cpu.c"
|
|
||||||
#include "northbridge/amd/amdk8/reset_test.c"
|
|
||||||
|
|
||||||
#include "northbridge/amd/amdk8/debug.c"
|
|
||||||
|
|
||||||
#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
|
|
||||||
|
|
||||||
#include "northbridge/amd/amdk8/amdk8_f.h"
|
|
||||||
|
|
||||||
#include "cpu/x86/mtrr.h"
|
|
||||||
#include "cpu/amd/mtrr.h"
|
|
||||||
#include "cpu/x86/tsc.h"
|
|
||||||
|
|
||||||
#include "northbridge/amd/amdk8/amdk8_f_pci.c"
|
|
||||||
#include "northbridge/amd/amdk8/raminit_f_dqs.c"
|
|
||||||
|
|
||||||
static inline unsigned get_nodes(void)
|
|
||||||
{
|
|
||||||
return ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60)>>4) & 7) + 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
#include "cpu/amd/dualcore/dualcore.c"
|
|
||||||
|
|
||||||
void hardwaremain(int ret_addr)
|
|
||||||
{
|
|
||||||
struct sys_info *sysinfo = &sysinfo_car; // in CACHE
|
|
||||||
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
|
|
||||||
|
|
||||||
struct node_core_id id;
|
|
||||||
|
|
||||||
id = get_node_core_id_x();
|
|
||||||
|
|
||||||
print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
|
|
||||||
|
|
||||||
train_ram(id.nodeid, sysinfo, sysinfox);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp
|
|
||||||
*/
|
|
||||||
|
|
||||||
__asm__ volatile (
|
|
||||||
"movl %0, %%edi\n\t"
|
|
||||||
"jmp *%%edi\n\t"
|
|
||||||
:: "a"(ret_addr)
|
|
||||||
);
|
|
||||||
}
|
|
||||||
|
|
||||||
#include <arch/registers.h>
|
|
||||||
|
|
||||||
void x86_exception(struct eregs *info)
|
|
||||||
{
|
|
||||||
do {
|
|
||||||
hlt();
|
|
||||||
} while(1);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
@ -1,101 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is part of the coreboot project.
|
|
||||||
*
|
|
||||||
* Copyright (C) 2007 AMD
|
|
||||||
* Written by Yinghai Lu <yinghailu@amd.com> for AMD.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
|
|
||||||
|
|
||||||
#include <stdint.h>
|
|
||||||
#include <device/pci_def.h>
|
|
||||||
#include <device/pci_ids.h>
|
|
||||||
#include <arch/io.h>
|
|
||||||
#include <device/pnp_def.h>
|
|
||||||
#include <cpu/x86/lapic.h>
|
|
||||||
#include <pc80/mc146818rtc.h>
|
|
||||||
|
|
||||||
#include "console/console.c"
|
|
||||||
#include "lib/uart8250.c"
|
|
||||||
#include "console/vtxprintf.c"
|
|
||||||
#include "./arch/x86/lib/printk_init.c"
|
|
||||||
|
|
||||||
#include <cpu/amd/model_fxx_rev.h>
|
|
||||||
#include "northbridge/amd/amdk8/raminit.h"
|
|
||||||
|
|
||||||
#include "lib/delay.c"
|
|
||||||
|
|
||||||
//#include "cpu/x86/lapic/boot_cpu.c"
|
|
||||||
#include "northbridge/amd/amdk8/reset_test.c"
|
|
||||||
|
|
||||||
#include "northbridge/amd/amdk8/debug.c"
|
|
||||||
|
|
||||||
#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
|
|
||||||
|
|
||||||
#include "northbridge/amd/amdk8/amdk8_f.h"
|
|
||||||
|
|
||||||
#include "cpu/x86/mtrr.h"
|
|
||||||
#include "cpu/amd/mtrr.h"
|
|
||||||
#include "cpu/x86/tsc.h"
|
|
||||||
|
|
||||||
#include "northbridge/amd/amdk8/amdk8_f_pci.c"
|
|
||||||
#include "northbridge/amd/amdk8/raminit_f_dqs.c"
|
|
||||||
|
|
||||||
static inline unsigned get_nodes(void)
|
|
||||||
{
|
|
||||||
return ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60)>>4) & 7) + 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
#include "cpu/amd/dualcore/dualcore.c"
|
|
||||||
|
|
||||||
void hardwaremain(int ret_addr)
|
|
||||||
{
|
|
||||||
struct sys_info *sysinfo = &sysinfo_car; // in CACHE
|
|
||||||
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
|
|
||||||
|
|
||||||
struct node_core_id id;
|
|
||||||
|
|
||||||
id = get_node_core_id_x();
|
|
||||||
|
|
||||||
print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
|
|
||||||
|
|
||||||
train_ram(id.nodeid, sysinfo, sysinfox);
|
|
||||||
|
|
||||||
/*
|
|
||||||
go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp
|
|
||||||
*/
|
|
||||||
|
|
||||||
__asm__ volatile (
|
|
||||||
"movl %0, %%edi\n\t"
|
|
||||||
"jmp *%%edi\n\t"
|
|
||||||
:: "a"(ret_addr)
|
|
||||||
);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
#include <arch/registers.h>
|
|
||||||
|
|
||||||
void x86_exception(struct eregs *info)
|
|
||||||
{
|
|
||||||
do {
|
|
||||||
hlt();
|
|
||||||
} while(1);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -1,89 +0,0 @@
|
||||||
/*
|
|
||||||
* This file is part of the coreboot project.
|
|
||||||
*
|
|
||||||
* Copyright (C) 2007 AMD
|
|
||||||
* Written by Yinghai Lu <yinghailu@amd.com> for AMD.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
|
|
||||||
|
|
||||||
#include <stdint.h>
|
|
||||||
#include <device/pci_def.h>
|
|
||||||
#include <device/pci_ids.h>
|
|
||||||
#include <arch/io.h>
|
|
||||||
#include <device/pnp_def.h>
|
|
||||||
#include <cpu/x86/lapic.h>
|
|
||||||
#include <pc80/mc146818rtc.h>
|
|
||||||
#include "console/console.c"
|
|
||||||
|
|
||||||
#include <cpu/amd/model_fxx_rev.h>
|
|
||||||
#include "northbridge/amd/amdk8/raminit.h"
|
|
||||||
|
|
||||||
#include "lib/delay.c"
|
|
||||||
|
|
||||||
//#include "cpu/x86/lapic/boot_cpu.c"
|
|
||||||
#include "northbridge/amd/amdk8/reset_test.c"
|
|
||||||
|
|
||||||
#include "northbridge/amd/amdk8/debug.c"
|
|
||||||
|
|
||||||
#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
|
|
||||||
|
|
||||||
#include "northbridge/amd/amdk8/amdk8_f.h"
|
|
||||||
|
|
||||||
#include "cpu/x86/mtrr.h"
|
|
||||||
#include "cpu/amd/mtrr.h"
|
|
||||||
#include "cpu/x86/tsc.h"
|
|
||||||
|
|
||||||
#include "northbridge/amd/amdk8/amdk8_f_pci.c"
|
|
||||||
#include "northbridge/amd/amdk8/raminit_f_dqs.c"
|
|
||||||
|
|
||||||
#include "cpu/amd/dualcore/dualcore.c"
|
|
||||||
|
|
||||||
void hardwaremain(int ret_addr)
|
|
||||||
{
|
|
||||||
struct sys_info *sysinfo = &sysinfo_car; // in CACHE
|
|
||||||
struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
|
|
||||||
|
|
||||||
struct node_core_id id;
|
|
||||||
|
|
||||||
id = get_node_core_id_x();
|
|
||||||
|
|
||||||
//FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP
|
|
||||||
print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
|
|
||||||
|
|
||||||
train_ram(id.nodeid, sysinfo, sysinfox);
|
|
||||||
|
|
||||||
/*
|
|
||||||
go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp
|
|
||||||
*/
|
|
||||||
|
|
||||||
__asm__ volatile (
|
|
||||||
"movl %0, %%edi\n\t"
|
|
||||||
"jmp *%%edi\n\t"
|
|
||||||
:: "a"(ret_addr)
|
|
||||||
);
|
|
||||||
}
|
|
||||||
|
|
||||||
#include <arch/registers.h>
|
|
||||||
|
|
||||||
void x86_exception(struct eregs *info)
|
|
||||||
{
|
|
||||||
do {
|
|
||||||
hlt();
|
|
||||||
} while(1);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
@ -2103,16 +2103,8 @@ static inline void train_ram_on_node(unsigned nodeid, unsigned coreid, struct sy
|
||||||
memcpy(sysinfo, sysinfox, sizeof(*sysinfo));
|
memcpy(sysinfo, sysinfox, sizeof(*sysinfo));
|
||||||
#endif
|
#endif
|
||||||
set_top_mem_ap(sysinfo->tom_k, sysinfo->tom2_k); // keep the ap's tom consistent with bsp's
|
set_top_mem_ap(sysinfo->tom_k, sysinfo->tom2_k); // keep the ap's tom consistent with bsp's
|
||||||
#if !CONFIG_AP_CODE_IN_CAR
|
|
||||||
printk(BIOS_DEBUG, "CODE IN ROM AND RUN ON NODE: %02x\n", nodeid);
|
printk(BIOS_DEBUG, "CODE IN ROM AND RUN ON NODE: %02x\n", nodeid);
|
||||||
train_ram(nodeid, sysinfo, sysinfox);
|
train_ram(nodeid, sysinfo, sysinfox);
|
||||||
#else
|
|
||||||
/* Can copy dqs_timing to ap cache and run from cache?
|
|
||||||
* we need coreboot_ap_car.rom? and treat it as coreboot_ram.rom for ap ?
|
|
||||||
*/
|
|
||||||
copy_and_run_ap_code_in_car(retcall);
|
|
||||||
// will go back by jump
|
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue