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falco: Update panel power sequence timings 

These are based on the datasheet and I included the timing
values I used from the docs.

Change-Id: Ib75b2c5e50ac09d1e4cf9dd22229bb0f0a8965a4
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58540
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4234
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Duncan Laurie 2013-06-11 16:17:56 -07:00 committed by Alexandru Gagniuc
parent ccd2f28fc4
commit 39536e955a
1 changed files with 5 additions and 5 deletions
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10
src/mainboard/google/falco/devicetree.cb
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@ -15,11 +15,11 @@ chip northbridge/intel/haswell
# Enable Panel and configure power delays
register "gpu_panel_port_select" = "1" # eDP
register "gpu_panel_power_cycle_delay" = "5" # 400ms
register "gpu_panel_power_up_delay" = "400" # 40ms
register "gpu_panel_power_down_delay" = "150" # 15ms
register "gpu_panel_power_backlight_on_delay" = "2100" # 210ms
register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms
register "gpu_panel_power_cycle_delay" = "5" # 400ms (T4)
register "gpu_panel_power_up_delay" = "600" # 60ms (T1+T2)
register "gpu_panel_power_down_delay" = "600" # 60ms (T3+T7)
register "gpu_panel_power_backlight_on_delay" = "2100" # 210ms (T5)
register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms (T6)
device cpu_cluster 0 on
chip cpu/intel/socket_rPGA989