soc/fsp_baytrail: Add support for FSP MR 005
Baytrail FSP MR 005 adds two new fields: AutoSelfRefreshEnable APTaskTimeoutCnt Add the device tree definitions. Change-Id: I12e2a8b0b5cbeb6b7289cf91f65b25e73007a8de Signed-off-by: Ben Gardner <gardner.ben@gmail.com> Reviewed-on: https://review.coreboot.org/12973 Tested-by: build bot (Jenkins) Reviewed-by: York Yang <york.yang@intel.com>
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@ -217,6 +217,16 @@ struct soc_intel_fsp_baytrail_config {
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#define ENABLE_IGD_DISABLE UPD_DISABLE
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#define ENABLE_IGD_ENABLE UPD_ENABLE
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/* AutoSelfRefreshEnable */
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uint8_t AutoSelfRefreshEnable;
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#define AUTO_SELF_REFRESH_DEFAULT UPD_DEFAULT
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#define AUTO_SELF_REFRESH_DISABLE UPD_DISABLE
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#define AUTO_SELF_REFRESH_ENABLE UPD_ENABLE
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/* APTaskTimeoutCnt */
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uint16_t APTaskTimeoutCnt;
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#define AP_TASK_TIMEOUT_CNT_DEFAULT UPD_DEFAULT
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/* Memory down data */
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uint8_t EnableMemoryDown;
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#define MEMORY_DOWN_DEFAULT UPD_DEFAULT
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@ -113,6 +113,8 @@ static void ConfigureDefaultUpdData(FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *U
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UPD_DEFAULT_CHECK(PcdEMMC45HS200Enabled);
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UPD_DEFAULT_CHECK(PcdEMMC45RetuneTimerValue);
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UPD_DEFAULT_CHECK(PcdEnableIgd);
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UPD_DEFAULT_CHECK(AutoSelfRefreshEnable);
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UPD_DEFAULT_CHECK(APTaskTimeoutCnt);
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if ((config->PcdeMMCBootMode != EMMC_USE_DEFAULT) ||
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(config->PcdeMMCBootMode != EMMC_FOLLOWS_DEVICETREE))
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@ -102,7 +102,9 @@ typedef struct _UPD_DATA_REGION {
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UINT8 PcdEMMC45HS200Enabled; /* Offset 0x0052 */
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UINT8 PcdEMMC45RetuneTimerValue; /* Offset 0x0053 */
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UINT8 PcdEnableIgd; /* Offset 0x0054 */
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UINT8 UnusedUpdSpace1[155]; /* Offset 0x0055 */
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UINT8 AutoSelfRefreshEnable; /* Offset 0x0055 */
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UINT16 APTaskTimeoutCnt; /* Offset 0x0056 */
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UINT8 UnusedUpdSpace1[152]; /* Offset 0x0058 */
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MEMORY_DOWN_DATA PcdMemoryParameters; /* Offset 0x00F0 */
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UINT16 PcdRegionTerminator; /* Offset 0x0100 */
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} UPD_DATA_REGION;
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