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mb/google/volteer: configure L1Substate for PCIe 

Limit PcieL1Substate for RP9, RP11 for ES1 NVMe warm reboot workaround.

Reference: #613582 Tiger Lake PCH-LP Sightings Report
           issue id #1409566330

BUG=none
BRANCH=none
TEST= boot to OS and check warm reboot with NVMe

Signed-off-by: Wonkyu Kim <wonkyu.kim@intel.com>
Change-Id: Ie85bf71c43427e326ef2ba674da4566f8f51495a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39413
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Wonkyu Kim 2020-03-09 13:42:45 -07:00 committed by Patrick Georgi
parent 84b4882b99
commit 396bb46e7d
1 changed files with 5 additions and 0 deletions
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5
src/mainboard/google/volteer/variants/ripto/overridetree.cb
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@ -1,5 +1,10 @@
chip soc/intel/tigerlake chip soc/intel/tigerlake
# NVMe warm reboot workaround
# Limit L1.1 (value:2) for RP9, RP11
register "PcieRpL1Substates[8]" = "2"
register "PcieRpL1Substates[10]" = "2"
device domain 0 on device domain 0 on
end end