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mb/google/hatch: Do not pull down GPP_F2 internally 

There is already an external pull-up/down resistor tied to
this pin to identify if the board is single-channel or
dual-channel memory SKU.

BUG=b:135496271
BRANCH=none
TEST=build

Signed-off-by: Philip Chen <philipchen@google.com>
Change-Id: Ie218657fd9dde113ab26cf5551d1dff1b6e392b6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33583
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Philip Chen 2019-06-18 12:48:34 -07:00 committed by Patrick Georgi
parent f70cb8bf96
commit 3970a9d964
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/hatch/variants/baseboard/gpio.c
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@ -284,7 +284,7 @@ static const struct pad_config gpio_table[] = {
/* F1 : WWAN_RESET_1V8_ODL */ /* F1 : WWAN_RESET_1V8_ODL */
PAD_CFG_GPO(GPP_F1, 1, DEEP), PAD_CFG_GPO(GPP_F1, 1, DEEP),
/* F2 : MEM_CH_SEL */ /* F2 : MEM_CH_SEL */
PAD_CFG_GPI(GPP_F2, DN_20K, PLTRST), PAD_CFG_GPI(GPP_F2, NONE, PLTRST),
/* F3 : GPP_F3 ==> NC */ /* F3 : GPP_F3 ==> NC */
PAD_NC(GPP_F3, NONE), PAD_NC(GPP_F3, NONE),
/* F4 : CNV_BRI_DT */ /* F4 : CNV_BRI_DT */
@ -460,7 +460,7 @@ static const struct pad_config early_gpio_table[] = {
/* C23 : WLAN_PE_RST# */ /* C23 : WLAN_PE_RST# */
PAD_CFG_GPO(GPP_C23, 1, DEEP), PAD_CFG_GPO(GPP_C23, 1, DEEP),
/* F2 : MEM_CH_SEL */ /* F2 : MEM_CH_SEL */
PAD_CFG_GPI(GPP_F2, DN_20K, PLTRST), PAD_CFG_GPI(GPP_F2, NONE, PLTRST),
/* F11 : PCH_MEM_STRAP2 */ /* F11 : PCH_MEM_STRAP2 */
PAD_CFG_GPI(GPP_F11, NONE, PLTRST), PAD_CFG_GPI(GPP_F11, NONE, PLTRST),
/* F20 : PCH_MEM_STRAP0 */ /* F20 : PCH_MEM_STRAP0 */