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sb/amd/amd8111: Get rid of device_t 

Use of device_t has been abandoned in ramstage.

Change-Id: I143617bb1a4ab1812ec50155861ae2f75060851b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26409
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Elyes HAOUAS 2018-05-19 14:45:20 +02:00 committed by Kyösti Mälkki
parent 8aafbd8252
commit 39733a065d
10 changed files with 33 additions and 23 deletions
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3
src/southbridge/amd/amd8111/ac97.c
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@ -8,7 +8,8 @@
#include <device/pci_ops.h>
#include "amd8111.h"
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
static void lpci_set_subsystem(struct device *dev, unsigned vendor,
unsigned device)
{
pci_write_config32(dev, 0x2c,
((device & 0xffff) << 16) | (vendor & 0xffff));

21
src/southbridge/amd/amd8111/acpi.c
View File

@ -21,7 +21,7 @@
#endif
static int lsmbus_recv_byte(device_t dev)
static int lsmbus_recv_byte(struct device *dev)
{
unsigned device;
struct resource *res;
@ -32,7 +32,7 @@ static int lsmbus_recv_byte(device_t dev)
return do_smbus_recv_byte(res->base, device);
}
static int lsmbus_send_byte(device_t dev, uint8_t val)
static int lsmbus_send_byte(struct device *dev, uint8_t val)
{
unsigned device;
struct resource *res;
@ -44,7 +44,7 @@ static int lsmbus_send_byte(device_t dev, uint8_t val)
}
static int lsmbus_read_byte(device_t dev, uint8_t address)
static int lsmbus_read_byte(struct device *dev, uint8_t address)
{
unsigned device;
struct resource *res;
@ -55,7 +55,7 @@ static int lsmbus_read_byte(device_t dev, uint8_t address)
return do_smbus_read_byte(res->base, device, address);
}
static int lsmbus_write_byte(device_t dev, uint8_t address, uint8_t val)
static int lsmbus_write_byte(struct device *dev, uint8_t address, uint8_t val)
{
unsigned device;
struct resource *res;
@ -66,7 +66,8 @@ static int lsmbus_write_byte(device_t dev, uint8_t address, uint8_t val)
return do_smbus_write_byte(res->base, device, address, val);
}
static int lsmbus_block_read(device_t dev, uint8_t cmd, u8 bytes, u8 *buffer)
static int lsmbus_block_read(struct device *dev, uint8_t cmd, u8 bytes,
u8 *buffer)
{
unsigned device;
struct resource *res;
@ -77,7 +78,8 @@ static int lsmbus_block_read(device_t dev, uint8_t cmd, u8 bytes, u8 *buffer)
return do_smbus_block_read(res->base, device, cmd, bytes, buffer);
}
static int lsmbus_block_write(device_t dev, uint8_t cmd, u8 bytes, const u8 *buffer)
static int lsmbus_block_write(struct device *dev, uint8_t cmd, u8 bytes,
const u8 *buffer)
{
unsigned device;
struct resource *res;
@ -168,7 +170,7 @@ static void acpi_init(struct device *dev)
}
static void acpi_read_resources(device_t dev)
static void acpi_read_resources(struct device *dev)
{
struct resource *resource;
@ -186,7 +188,7 @@ static void acpi_read_resources(device_t dev)
resource->index = 0x58;
}
static void acpi_enable_resources(device_t dev)
static void acpi_enable_resources(struct device *dev)
{
uint8_t byte;
/* Enable the generic pci resources */
@ -202,7 +204,8 @@ static void acpi_enable_resources(device_t dev)
}
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
static void lpci_set_subsystem(struct device *dev, unsigned vendor,
unsigned device)
{
pci_write_config32(dev, 0x7c,
((device & 0xffff) << 16) | (vendor & 0xffff));

6
src/southbridge/amd/amd8111/amd8111.c
View File

@ -4,10 +4,10 @@
#include <device/pci_ids.h>
#include "amd8111.h"
void amd8111_enable(device_t dev)
void amd8111_enable(struct device *dev)
{
device_t lpc_dev;
device_t bus_dev;
struct device *lpc_dev;
struct device *bus_dev;
unsigned index;
unsigned reg_old, reg;

2
src/southbridge/amd/amd8111/amd8111.h
View File

@ -4,7 +4,7 @@
#include "chip.h"
#ifndef __SIMPLE_DEVICE__
void amd8111_enable(device_t dev);
void amd8111_enable(struct device *dev);
#endif
#ifdef __PRE_RAM__

3
src/southbridge/amd/amd8111/ide.c
View File

@ -40,7 +40,8 @@ static void ide_init(struct device *dev)
pci_write_config16(dev, 0x42, word);
}
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
static void lpci_set_subsystem(struct device *dev, unsigned vendor,
unsigned device)
{
pci_write_config32(dev, 0x70,
((device & 0xffff) << 16) | (vendor & 0xffff));

7
src/southbridge/amd/amd8111/lpc.c
View File

@ -86,7 +86,7 @@ static void lpc_init(struct device *dev)
enable_hpet(dev);
}
static void amd8111_lpc_read_resources(device_t dev)
static void amd8111_lpc_read_resources(struct device *dev)
{
struct resource *res;
@ -112,7 +112,8 @@ static void amd8111_lpc_read_resources(device_t dev)
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
static void lpci_set_subsystem(struct device *dev, unsigned vendor,
unsigned device)
{
pci_write_config32(dev, 0x70,
((device & 0xffff) << 16) | (vendor & 0xffff));
@ -128,7 +129,7 @@ unsigned long acpi_fill_mcfg(unsigned long current)
return current;
}
static void southbridge_acpi_fill_ssdt_generator(device_t device) {
static void southbridge_acpi_fill_ssdt_generator(struct device *device) {
#if IS_ENABLED(CONFIG_SET_FIDVID)
amd_generate_powernow(pm_base + 0x10, 6, 1);
acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS");

3
src/southbridge/amd/amd8111/nic.c
View File

@ -63,7 +63,8 @@ static void nic_init(struct device *dev)
printk(BIOS_DEBUG, "Done\n");
}
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
static void lpci_set_subsystem(struct device *dev, unsigned vendor,
unsigned device)
{
pci_write_config32(dev, 0xc8,
((device & 0xffff) << 16) | (vendor & 0xffff));

3
src/southbridge/amd/amd8111/smbus.c
View File

@ -11,7 +11,8 @@
#include "amd8111.h"
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
static void lpci_set_subsystem(struct device *dev, unsigned vendor,
unsigned device)
{
pci_write_config32(dev, 0x44,
((device & 0xffff) << 16) | (vendor & 0xffff));

3
src/southbridge/amd/amd8111/usb.c
View File

@ -10,7 +10,8 @@
#include "amd8111.h"
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
static void lpci_set_subsystem(struct device *dev, unsigned vendor,
unsigned device)
{
pci_write_config32(dev, 0x70,
((device & 0xffff) << 16) | (vendor & 0xffff));

5
src/southbridge/amd/amd8111/usb2.c
View File

@ -9,7 +9,8 @@
#if 0
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
static void lpci_set_subsystem(struct device *dev, unsigned vendor,
unsigned device)
{
pci_write_config32(dev, 0x70,
((device & 0xffff) << 16) | (vendor & 0xffff));
@ -21,7 +22,7 @@ static struct pci_operations lops_pci = {
#endif
static void amd8111_usb2_enable(device_t dev)
static void amd8111_usb2_enable(struct device *dev)
{
// Due to buggy USB2 we force it to disable.
dev->enabled = 0;