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intel cache-as-ram: Unify stack setup 

No need to have %ebx reserved here.

Change-Id: I9fe9292ddc610079b876019a71c69af5b1bcf2a2
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17357
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki 2016-11-08 12:13:15 +02:00
parent a4ffe9dda0
commit 39915bc290
5 changed files with 16 additions and 35 deletions
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13
src/cpu/intel/car/cache_as_ram_ht.inc
View File

@ -324,8 +324,9 @@ no_msr_11e:
andl $(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
movl %eax, %cr0
/* Set up the stack pointer. */
movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %esp
/* Setup the stack. */
movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax
movl %eax, %esp
/* Restore the BIST result. */
movl %ebp, %eax
@ -340,7 +341,7 @@ before_romstage:
/* Save return value from romstage_main. It contains the stack to use
* after cache-as-ram is torn down.
*/
movl %eax, %ebx
movl %eax, %esp
post_code(0x30)
@ -424,11 +425,7 @@ before_romstage:
__main:
post_code(POST_PREPARE_RAMSTAGE)
cld /* Clear direction flag. */
/* Setup stack as indicated by return value from romstage_main(). */
movl %ebx, %esp
movl %esp, %ebp
call copy_and_run
call romstage_after_car
.Lhlt:
post_code(POST_DEAD_CODE)

5
src/cpu/intel/haswell/cache_as_ram.inc
View File

@ -177,7 +177,7 @@ before_romstage:
/* Save return value from romstage_main. It contains the stack to use
* after cache-as-ram is torn down. It also contains the information
* for setting up MTRRs. */
movl %eax, %ebx
movl %eax, %esp
post_code(0x30)
@ -225,9 +225,6 @@ before_romstage:
post_code(0x38)
/* Setup stack as indicated by return value from romstage_main(). */
movl %ebx, %esp
/* Get number of MTRRs. */
popl %ebx
movl $MTRR_PHYS_BASE(0), %ecx

13
src/cpu/intel/model_2065x/cache_as_ram.inc
View File

@ -156,8 +156,8 @@ clear_var_mtrrs:
andl $(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
movl %eax, %cr0
/* Set up the stack pointer below the end of CAR. */
movl $(CACHE_AS_RAM_SIZE + CACHE_AS_RAM_BASE - 4), %eax
/* Setup the stack. */
movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax
movl %eax, %esp
/* Restore the BIST result. */
@ -169,11 +169,10 @@ before_romstage:
post_code(0x29)
/* Call romstage.c main function. */
call romstage_main
/* Save return value from romstage_main. It contains the stack to use
* after cache-as-ram is torn down.
*/
movl %eax, %ebx
movl %eax, %esp
post_code(0x30)
@ -272,11 +271,7 @@ before_romstage:
__main:
post_code(POST_PREPARE_RAMSTAGE)
cld /* Clear direction flag. */
/* Setup stack as indicated by return value from romstage_main(). */
movl %ebx, %esp
movl %esp, %ebp
call copy_and_run
call romstage_after_car
.Lhlt:
post_code(POST_DEAD_CODE)

8
src/cpu/intel/model_206ax/cache_as_ram.inc
View File

@ -178,7 +178,7 @@ before_romstage:
/* Save return value from romstage_main. It contains the stack to use
* after cache-as-ram is torn down.
*/
movl %eax, %ebx
movl %eax, %esp
post_code(0x30)
@ -285,11 +285,7 @@ before_romstage:
__main:
post_code(POST_PREPARE_RAMSTAGE)
cld /* Clear direction flag. */
/* Setup stack as indicated by return value from romstage_main(). */
movl %ebx, %esp
movl %esp, %ebp
call copy_and_run
call romstage_after_car
.Lhlt:
post_code(POST_DEAD_CODE)

12
src/cpu/intel/model_6ex/cache_as_ram.inc
View File

@ -125,8 +125,8 @@ clear_mtrrs:
andl $(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
movl %eax, %cr0
/* Set up the stack pointer. */
movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %eax
/* Setup the stack. */
movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax
movl %eax, %esp
/* Restore the BIST result. */
@ -142,7 +142,7 @@ before_romstage:
/* Save return value from romstage_main. It contains the stack to use
* after cache-as-ram is torn down.
*/
movl %eax, %ebx
movl %eax, %esp
post_code(0x30)
@ -226,11 +226,7 @@ before_romstage:
__main:
post_code(POST_PREPARE_RAMSTAGE)
cld /* Clear direction flag. */
/* Setup stack as indicated by return value from romstage_main(). */
movl %ebx, %esp
movl %esp, %ebp
call copy_and_run
call romstage_after_car
.Lhlt:
post_code(POST_DEAD_CODE)