soc/mediatek/mt8192: Enlarge DRAM_INIT_CODE size
From the output of 'objdump -x dram.elf', the DRAM blob needs 222K memory, but currently only 208K is reserved for it. Since MT8192 has 1MB SRAM L2C, increase SRAM_L2C_END to 0x00300000, and reorganize regions in SRAM_L2C to have larger DRAM_INIT_CODE (256K). The size of OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE is also increased to 252K. BUG=b:170687062 TEST=emerge-asurada coreboot TEST=Asurada booted successfully BRANCH=none Cq-Depend: chrome-internal:3568265 Change-Id: I062f00739b72cf6b1bb7ac3318b91721fbe226cc Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50017 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
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@ -12,7 +12,7 @@
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#define SRAM_L2C_START(addr) SYMBOL(sram_l2c, addr)
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#define SRAM_L2C_END(addr) SYMBOL(esram_l2c, addr)
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#define DRAM_INIT_CODE(addr, size) \
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REGION(dram_init_code, addr, size, 4)
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REGION(dram_init_code, addr, size, 64K)
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#define DRAM_DMA(addr, size) \
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REGION(dram_dma, addr, size, 4K) \
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@ -40,11 +40,16 @@ SECTIONS
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SRAM_END(0x00120000)
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SRAM_L2C_START(0x00200000)
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/* 4K reserved for BOOTROM until BOOTBLOCK is started */
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BOOTBLOCK(0x00201000, 64K)
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OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x00211000, 188K)
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DRAM_INIT_CODE(0x00240000, 208K)
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PRERAM_CBFS_CACHE(0x00274000, 48K)
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SRAM_L2C_END(0x00280000)
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OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x00211000, 252K)
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/*
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* The needed size can be obtained by:
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* aarch64-cros-linux-gnu-objdump -x dram.elf | grep memsz
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*/
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DRAM_INIT_CODE(0x00250000, 256K)
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PRERAM_CBFS_CACHE(0x00290000, 48K)
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SRAM_L2C_END(0x00300000)
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DRAM_START(0x40000000)
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DRAM_DMA(0x40000000, 1M)
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