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soc/intel/common/block: Add space before comment delimiter 

Update comment section to add space before comment delimiter to
follow coding style.

Change-Id: I883aeaa9839fa96fd7baf0c771b394409b18ddca
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56547
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2021-07-23 14:57:50 +05:30
parent eeaf569257
commit 39b53d9622
2 changed files with 10 additions and 10 deletions
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2
src/soc/intel/common/block/cpu/car/cache_as_ram.S
View File

@ -515,7 +515,7 @@ find_llc_subleaf:
set_eviction_mask:
mov %ebx, %edi /* back up number of ways */
mov %eax, %esi /* back up the non-eviction mask*/
mov %eax, %esi /* back up the non-eviction mask */
#if CONFIG(CAR_HAS_SF_MASKS)
/*
* SF mask is programmed with the double number of bits than

18
src/soc/intel/common/block/include/intelblocks/itss.h
View File

@ -3,23 +3,23 @@
#ifndef SOC_INTEL_COMMON_BLOCK_ITSS_H
#define SOC_INTEL_COMMON_BLOCK_ITSS_H
/* PIRQA Routing Control Register*/
/* PIRQA Routing Control Register */
#define PCR_ITSS_PIRQA_ROUT 0x3100
/* PIRQB Routing Control Register*/
/* PIRQB Routing Control Register */
#define PCR_ITSS_PIRQB_ROUT 0x3101
/* PIRQC Routing Control Register*/
/* PIRQC Routing Control Register */
#define PCR_ITSS_PIRQC_ROUT 0x3102
/* PIRQD Routing Control Register*/
/* PIRQD Routing Control Register */
#define PCR_ITSS_PIRQD_ROUT 0x3103
/* PIRQE Routing Control Register*/
/* PIRQE Routing Control Register */
#define PCR_ITSS_PIRQE_ROUT 0x3104
/* PIRQF Routing Control Register*/
/* PIRQF Routing Control Register */
#define PCR_ITSS_PIRQF_ROUT 0x3105
/* PIRQG Routing Control Register*/
/* PIRQG Routing Control Register */
#define PCR_ITSS_PIRQG_ROUT 0x3106
/* PIRQH Routing Control Register*/
/* PIRQH Routing Control Register */
#define PCR_ITSS_PIRQH_ROUT 0x3107
/* ITSS Interrupt polarity control*/
/* ITSS Interrupt polarity control */
#define PCR_ITSS_IPC0_CONF 0x3200
/* ITSS Power reduction control */
#define PCR_ITSS_ITSSPRC 0x3300