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soc/amd/common: Move external oscillator config away from common

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The usage of external oscillator has got nothing to do with Audio
Co-processor (ACP). Hence move it out of common config and put it into
the SoC config where it is being used.

BUG=None
TEST=Build Dalboz and Vilboz mainboards.

Change-Id: I8c5d98addfba750f9ddb87a846599541b4a8340a
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Karthikeyan Ramasubramanian 2021-04-29 16:50:51 -06:00 committed by Felix Held
parent 2713da3614
commit 39b7afa118
4 changed files with 6 additions and 7 deletions
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2
src/mainboard/google/zork/variants/vilboz/variant.c
View file

@ -45,7 +45,7 @@ void variant_devtree_update(void)
/* b:/174121847 Use external OSC to mitigate noise for WWAN sku. */ /* b:/174121847 Use external OSC to mitigate noise for WWAN sku. */
if (variant_has_wwan()) { if (variant_has_wwan()) {
soc_cfg->common_config.acp_config.acp_i2s_use_external_48mhz_osc = 1; soc_cfg->acp_i2s_use_external_48mhz_osc = 1;
/* eDP phy tuning settings */ /* eDP phy tuning settings */
soc_cfg->edp_phy_override = ENABLE_EDP_TUNINGSET; soc_cfg->edp_phy_override = ENABLE_EDP_TUNINGSET;

3
src/soc/amd/common/block/include/amdblocks/acp.h
View file

@ -17,9 +17,6 @@ struct acp_config {
u8 acp_i2s_wake_enable; u8 acp_i2s_wake_enable;
/* Enable ACP PME (0 = disable, 1 = enable) */ /* Enable ACP PME (0 = disable, 1 = enable) */
u8 acp_pme_enable; u8 acp_pme_enable;
/* If using an external 48MHz OSC for codec, will disable internal X48M_OSC */
bool acp_i2s_use_external_48mhz_osc;
}; };
#endif /* AMD_COMMON_ACP_H */ #endif /* AMD_COMMON_ACP_H */

2
src/soc/amd/picasso/chip.h
View file

@ -257,6 +257,8 @@ struct soc_amd_picasso_config {
/* The array index is the general purpose PCIe clock output number. */ /* The array index is the general purpose PCIe clock output number. */
enum gpp_clk_req_setting gpp_clk_config[GPP_CLK_OUTPUT_COUNT]; enum gpp_clk_req_setting gpp_clk_config[GPP_CLK_OUTPUT_COUNT];
/* If using an external 48MHz OSC for codec, will disable internal X48M_OSC */
bool acp_i2s_use_external_48mhz_osc;
/* eDP phy tuning settings */ /* eDP phy tuning settings */
uint16_t edp_phy_override; uint16_t edp_phy_override;

6
src/soc/amd/picasso/fch.c
View file

@ -90,12 +90,12 @@ const struct irq_idx_name *sb_get_apic_reg_association(size_t *size)
void sb_clk_output_48Mhz(void) void sb_clk_output_48Mhz(void)
{ {
u32 ctrl; u32 ctrl;
const struct soc_amd_common_config *cfg = soc_get_common_config(); const struct soc_amd_picasso_config *cfg = config_of_soc();
ctrl = misc_read32(MISC_CLK_CNTL1); ctrl = misc_read32(MISC_CLK_CNTL1);
/* If used external clock source for I2S, disable the internal clock output */ /* If used external clock source for I2S, disable the internal clock output */
if (cfg->acp_config.acp_i2s_use_external_48mhz_osc && if (cfg->acp_i2s_use_external_48mhz_osc &&
cfg->acp_config.acp_pin_cfg == I2S_PINS_I2S_TDM) cfg->common_config.acp_config.acp_pin_cfg == I2S_PINS_I2S_TDM)
ctrl &= ~BP_X48M0_OUTPUT_EN; ctrl &= ~BP_X48M0_OUTPUT_EN;
else else
ctrl |= BP_X48M0_OUTPUT_EN; ctrl |= BP_X48M0_OUTPUT_EN;