nb/i945/raminit.c: Fix dll timings on 945GC
Values based on vendor bios. TESTED on ga-945gcm-s2l with 667MHz ddr2. Change-Id: I2160f0ac73776b20e2cc1ff5bf77ebe98d2c2672 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/17197 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins)
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@ -1236,10 +1236,18 @@ static void sdram_program_dll_timings(struct sys_info *sysinfo)
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MCHBAR16(DQSMT) |= (1 << 13) | (0xc << 0);
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/* We drive both channels with the same speed */
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switch (sysinfo->memory_frequency) {
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case 400: chan0dll = 0x26262626; chan1dll = 0x26262626; break; /* 400MHz */
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case 533: chan0dll = 0x22222222; chan1dll = 0x22222222; break; /* 533MHz */
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case 667: chan0dll = 0x11111111; chan1dll = 0x11111111; break; /* 667MHz */
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if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM)) {
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switch (sysinfo->memory_frequency) {
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case 400: chan0dll = 0x26262626; chan1dll = 0x26262626; break; /* 400MHz */
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case 533: chan0dll = 0x22222222; chan1dll = 0x22222222; break; /* 533MHz */
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case 667: chan0dll = 0x11111111; chan1dll = 0x11111111; break; /* 667MHz */
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}
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} else if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) {
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switch (sysinfo->memory_frequency) {
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case 400: chan0dll = 0x33333333; chan1dll = 0x33333333; break; /* 400MHz */
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case 533: chan0dll = 0x24242424; chan1dll = 0x24242424; break; /* 533MHz */
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case 667: chan0dll = 0x25252525; chan1dll = 0x25252525; break; /* 667MHz */
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}
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}
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for (i = 0; i < 4; i++) {
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@ -1247,6 +1255,10 @@ static void sdram_program_dll_timings(struct sys_info *sysinfo)
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MCHBAR32(C0R0B00DQST + (i * 0x10) + 4) = chan0dll;
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MCHBAR32(C1R0B00DQST + (i * 0x10) + 0) = chan1dll;
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MCHBAR32(C1R0B00DQST + (i * 0x10) + 4) = chan1dll;
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if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) {
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MCHBAR8(C0R0B00DQST + (i * 0x10) + 8) = chan0dll & 0xff;
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MCHBAR8(C1R0B00DQST + (i * 0x10) + 8) = chan1dll & 0xff;
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}
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}
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}
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