soc/intel/cannonlake/bootblock: Add CML-S 2/4-Core MCH IDs
This patch adds CML-S 2 and 4-Core MCH IDs and fix wrong ID for 10-Core ID. Change-Id: I30f6c8a5234b7754d984b598bf7bae103ec9712e Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38287 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -3399,9 +3399,11 @@
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#define PCI_DEVICE_ID_INTEL_CML_ULT_6_2 0x9B51
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#define PCI_DEVICE_ID_INTEL_CML_ULX 0x9B60
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#define PCI_DEVICE_ID_INTEL_CML_S 0x9B55
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#define PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2 0x9B53
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#define PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2 0x9B35
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#define PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2 0x9B33
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#define PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2 0x9B43
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#define PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2 0x9B53
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#define PCI_DEVICE_ID_INTEL_CML_S_G0G1_4 0x9B63
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#define PCI_DEVICE_ID_INTEL_CML_S_G0G1_2 0x9B73
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#define PCI_DEVICE_ID_INTEL_CML_H 0x9B54
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#define PCI_DEVICE_ID_INTEL_CML_H_4_2 0x9B64
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#define PCI_DEVICE_ID_INTEL_CML_H_8_2 0x9B44
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@ -83,6 +83,8 @@ static struct {
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{ PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2, "CometLake-S G0/G1/P0/P1 (6+2)" },
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{ PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2, "CometLake-S P0/P1 (8+2)" },
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{ PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2, "CometLake-S P0/P1 (10+2)" },
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{ PCI_DEVICE_ID_INTEL_CML_S_G0G1_4, "CometLake-S G0/G1 (4+2)" },
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{ PCI_DEVICE_ID_INTEL_CML_S_G0G1_2, "CometLake-S G0/G1 (2+2)" },
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{ PCI_DEVICE_ID_INTEL_CML_H, "CometLake-H (6+2)" },
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{ PCI_DEVICE_ID_INTEL_CML_H_4_2, "CometLake-H (4+2)" },
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{ PCI_DEVICE_ID_INTEL_CML_H_8_2, "CometLake-H (8+2)" },
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@ -391,6 +391,8 @@ static const unsigned short systemagent_ids[] = {
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PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2,
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PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2,
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PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2,
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PCI_DEVICE_ID_INTEL_CML_S_G0G1_4,
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PCI_DEVICE_ID_INTEL_CML_S_G0G1_2,
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PCI_DEVICE_ID_INTEL_CML_H,
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PCI_DEVICE_ID_INTEL_CML_H_4_2,
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PCI_DEVICE_ID_INTEL_CML_H_8_2,
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