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amd/fam15tn/gcccar.inc: Fix msr access with clang 

Change-Id: I21bebd475dce373a77626d2e78a0ab10678ea8b6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63044
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
This commit is contained in:
Arthur Heymans 2022-03-23 21:35:32 +01:00
parent 901578518f
commit 3a077965de
1 changed files with 2 additions and 2 deletions
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4
src/vendorcode/amd/agesa/f15tn/gcccar.inc
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@ -971,9 +971,9 @@ fam15_skipClearingBit4:
1: #.if (al == 01h) # TN only 1: #.if (al == 01h) # TN only
#Enable MSRC001_001F[EnableCf8ExtCfg] #Enable MSRC001_001F[EnableCf8ExtCfg]
mov $NB_CFG, %ecx # MSR:C001_001F mov $NB_CFG, %ecx # MSR:C001_001F
_rdmsr _RDMSR
bts $(ENABLE_CF8_EXT_CFG - 32), %edx bts $(ENABLE_CF8_EXT_CFG - 32), %edx
_wrmsr _WRMSR
# Set F3x44[6, CpuErrDis] = 1 # Set F3x44[6, CpuErrDis] = 1
MAKE_EXT_PCI_ADDR 0, 0, 24, FUNC_3, 0x44 //MCA_NB_CFG MAKE_EXT_PCI_ADDR 0, 0, 24, FUNC_3, 0x44 //MCA_NB_CFG
//mov $(1 << 31 | 2 << 28 | (((MCA_NB_CFG) & (0x0F00)) >> 8) << 24 | 2 << 16 | 1 << 11 | FUNC_3 << 8), %eax //mov $(1 << 31 | 2 << 28 | (((MCA_NB_CFG) & (0x0F00)) >> 8) << 24 | 2 << 16 | 1 << 11 | FUNC_3 << 8), %eax