mb/google/corsola: Configure TPM IRQ as EDGE_FALLING

When the GSC is ready for the next transaction, it triggers a
GSC_AP_INT_ODL (active low) pulse with 100us duration to notify the AP.
Currently the TPM IRQ is configured as EDGE_RISING. Changing it to
EDGE_FALLING would speed up each register access by 100us. On Kingler,
this saves 20ms for the boot time (0.93s -> 0.91s).

BUG=b:235185547
TEST=emerge-corsola coreboot
TEST=Kingler booted without TPM errors
BRANCH=none

Change-Id: Id282e0f35694bd151781845cbd5aa4b389a30ddc
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68327
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
This commit is contained in:
Yu-Ping Wu 2022-10-06 12:37:25 +08:00 committed by Yu-Ping Wu
parent a2efadd1b4
commit 3a1333da36
1 changed files with 1 additions and 1 deletions

View File

@ -18,6 +18,6 @@ void bootblock_mainboard_init(void)
mtk_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, SPI_PAD0_MASK, 1 * MHz, 0);
mtk_snfc_init(SPI_NOR_GPIO_SET1);
setup_chromeos_gpios();
gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_EDGE_RISING);
gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_EDGE_FALLING);
usb3_hub_reset();
}