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soc/apollolake: enable access to RTC NVRAM 

FSP unconditionally locks parts of the NVRAM in the RTC.
This change will enable coreboot to update the locking policy
and be able to unlock the region

BUG=chrome-os-partner:55944
TEST=Check 'crossystem dev_boot_usb=1'

Change-Id: I70fd2bafa6ff9eb9cdf284b9780e4b90dee0f4ce
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Reviewed-on: https://review.coreboot.org/16144
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
This commit is contained in:
Ravi Sarawadi 2016-08-10 11:33:56 -07:00 committed by Furquan Shaikh
parent 105828d12a
commit 3a21d0f341
1 changed files with 3 additions and 0 deletions
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3
src/soc/intel/apollolake/chip.c
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@ -397,6 +397,9 @@ void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd)
/* Disable setting of EISS bit in FSP. */
silconfig->SpiEiss = 0;
/* Disable FSP from locking access to the RTC NVRAM */
silconfig->RtcLock = 0;
}
struct chip_operations soc_intel_apollolake_ops = {