mb/asrock/h110m/devicetree: fix VR config info
Removes unnecessary information about the Ring Sliced VR configuration from another board with FSP1.1 (which is no longer supported). Change-Id: Ia2b90d9ede782852c2127da972333bada378b217 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36378 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -82,21 +82,21 @@ chip soc/intel/skylake
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# SLP_A Minimum Assertion Width. Values 0: 0ms, 1: 4s, 2: 98ms, 3: 2s
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# SLP_A Minimum Assertion Width. Values 0: 0ms, 1: 4s, 2: 98ms, 3: 2s
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register "PmConfigSlpAMinAssert" = "0x03"
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register "PmConfigSlpAMinAssert" = "0x03"
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# VR Settings Configuration for 5 Domains
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# VR Settings Configuration
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#+----------------+-------+-------+-------------+-------------+-------+
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#+----------------+-------+-------+-------------+-------+
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#| Domain/Setting | SA | IA | Ring Sliced | GT Unsliced | GT |
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#| Domain/Setting | SA | IA | GT Unsliced | GT |
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#+----------------+-------+-------+-------------+-------------+-------+
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#+----------------+-------+-------+-------------+-------+
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#| Psi1Threshold | 20A | 20A | 20A | 20A | 20A |
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#| Psi1Threshold | 20A | 20A | 20A | 20A |
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#| Psi2Threshold | 4A | 5A | 5A | 5A | 5A |
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#| Psi2Threshold | 4A | 5A | 5A | 5A |
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#| Psi3Threshold | 1A | 1A | 1A | 1A | 1A |
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#| Psi3Threshold | 1A | 1A | 1A | 1A |
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#| Psi3Enable | 1 | 1 | 1 | 1 | 1 |
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#| Psi3Enable | 1 | 1 | 1 | 1 |
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#| Psi4Enable | 1 | 1 | 1 | 1 | 1 |
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#| Psi4Enable | 1 | 1 | 1 | 1 |
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#| ImonSlope | 0 | 0 | 0 | 0 | 0 |
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#| ImonSlope | 0 | 0 | 0 | 0 |
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#| ImonOffset | 0 | 0 | 0 | 0 | 0 |
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#| ImonOffset | 0 | 0 | 0 | 0 |
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#| IccMax* | 0 | 0 | 0 | 0 | 0 |
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#| IccMax* | 0 | 0 | 0 | 0 |
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#| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V | 1.52V |
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#| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
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#+----------------+-------+-------+-------------+-------------+-------+
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#+----------------+-------+-------+-------------+-------+
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# * - is set automatically for the KBL-S/KBL-DT CPUs in the vr_config.c
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# * - is set automatically in the vr_config.c
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register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
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register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
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.vr_config_enable = 1, \
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.vr_config_enable = 1, \
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.psi1threshold = VR_CFG_AMP(20), \
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.psi1threshold = VR_CFG_AMP(20), \
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