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mb/system76/gaze16: Configure GPIOs in mainboard_init() 

Configure GPIOs in `mainboard_init()` instead of during FSP config.

Change-Id: Icc40ce71d2bd104c5f41e992f9b28824a3b734d6
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66169
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tim Crawford 2022-07-26 14:04:04 -06:00 committed by Martin Roth
parent 34c8a19f92
commit 3a5217a77b
4 changed files with 13 additions and 11 deletions
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11
src/mainboard/system76/gaze16/ramstage.c
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@ -2,13 +2,12 @@
#include <soc/ramstage.h>
#include <variant/gpio.h>
#include "variant.h"
void mainboard_silicon_init_params(FSP_S_CONFIG *params)
static void mainboard_init(void *chip_info)
{
variant_silicon_init_params(params);
params->PchLegacyIoLowLatency = 1;
variant_configure_gpios();
}
struct chip_operations mainboard_ops = {
.init = mainboard_init,
};

1
src/mainboard/system76/gaze16/variant.h
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@ -6,6 +6,5 @@
#include <fsp/soc_binding.h>
void variant_memory_init_params(FSPM_UPD *mupd);
void variant_silicon_init_params(FSP_S_CONFIG *params);
#endif

6
src/mainboard/system76/gaze16/variants/gaze16-3050/ramstage.c
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@ -1,9 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include "../../variant.h"
#include <soc/ramstage.h>
void variant_silicon_init_params(FSP_S_CONFIG *params)
void mainboard_silicon_init_params(FSP_S_CONFIG *params)
{
params->PchLegacyIoLowLatency = 1;
// PEG0 Config
params->CpuPcieRpAdvancedErrorReporting[0] = 0;
params->CpuPcieRpLtrEnable[0] = 1;

6
src/mainboard/system76/gaze16/variants/gaze16-3060/ramstage.c
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@ -1,9 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include "../../variant.h"
#include <soc/ramstage.h>
void variant_silicon_init_params(FSP_S_CONFIG *params)
void mainboard_silicon_init_params(FSP_S_CONFIG *params)
{
params->PchLegacyIoLowLatency = 1;
// PEG0 Config
params->CpuPcieRpAdvancedErrorReporting[0] = 0;
params->CpuPcieRpLtrEnable[0] = 1;