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soc/*/Makefile: don't add cpu/x86/cache 

No SoC uses the ramstage-only x86_enable_cache helper function to call
enable_cache with some added port 0x80 and console output.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Suggested-by: Angel Pons <th3fanbus@gmail.com>
Change-Id: I7c5039e1341fd4089078ad7ffb2fe6584a94045c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58547
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Felix Held 2021-10-22 22:38:21 +02:00 committed by Felix Held
parent cb2fd20c7f
commit 3a79633920
5 changed files with 0 additions and 5 deletions
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1
src/soc/amd/picasso/Makefile.inc
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@ -3,7 +3,6 @@
ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
subdirs-y += ../../../cpu/x86/lapic
subdirs-y += ../../../cpu/x86/cache
subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../common/psp_verstage

1
src/soc/amd/stoneyridge/Makefile.inc
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@ -4,7 +4,6 @@ ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y)
subdirs-y += ../../../cpu/amd/mtrr/
subdirs-y += ../../../cpu/x86/lapic
subdirs-y += ../../../cpu/x86/cache
bootblock-y += uart.c
bootblock-y += BiosCallOuts.c

1
src/soc/intel/apollolake/Makefile.inc
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@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/intel/common
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../cpu/x86/lapic
subdirs-y += ../../../cpu/x86/cache
bootblock-y += bootblock/bootblock.c
bootblock-y += ../common/block/cpu/pm_timer_emulation.c

1
src/soc/intel/denverton_ns/Makefile.inc
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@ -5,7 +5,6 @@ ifeq ($(CONFIG_SOC_INTEL_DENVERTON_NS),y)
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../cpu/x86/lapic
subdirs-y += ../../../cpu/x86/cache
bootblock-y += bootblock/bootblock.c
bootblock-y += spi.c

1
src/soc/intel/xeon_sp/skx/Makefile.inc
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@ -5,7 +5,6 @@ ifeq ($(CONFIG_SOC_INTEL_SKYLAKE_SP),y)
subdirs-y += ../../../../cpu/intel/microcode
subdirs-y += ../../../../cpu/intel/turbo
subdirs-y += ../../../../cpu/x86/lapic
subdirs-y += ../../../../cpu/x86/cache
postcar-y += soc_util.c