ARMv7: drop libgcc copy
We accidently checked in some files from libgcc as well as a Makefile from u-boot and a duplicate implementation of div0. Drop all those files to reduce the confusion. Change-Id: I8ff6eabbced6f663813f8cc55f19c81839d03477 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2102 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
parent
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3a8badc265
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@ -11,7 +11,6 @@ romstage-y += syslib.c
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ramstage-y += c_start.S
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#ramstage-y += div.c
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ramstage-y += div0.c
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ramstage-y += div64.S
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ramstage-y += hang_spl.c
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@ -1,95 +0,0 @@
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#
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# (C) Copyright 2002-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(ARCH).o
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LIBGCC = $(obj)libgcc.o
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ifndef CONFIG_SPL_BUILD
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GLSOBJS += _ashldi3.o
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GLSOBJS += _ashrdi3.o
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GLSOBJS += _divsi3.o
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GLSOBJS += _lshrdi3.o
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GLSOBJS += _modsi3.o
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GLSOBJS += _udivsi3.o
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GLSOBJS += _umodsi3.o
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ifdef CONFIG_CHROMEOS
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GLSOBJS += _uldivmod.o
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endif
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GLCOBJS += div0.o
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ifeq ($(CONFIG_SYS_GENERIC_BOARD),)
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COBJS-y += board.o
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endif
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COBJS-y += bootm.o
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COBJS-y += cache.o
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COBJS-y += cache-cp15.o
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COBJS-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
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SOBJS-$(CONFIG_USE_ARCH_MEMSET) += memset.o
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SOBJS-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o
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else # CONFIG_SPL_BUILD
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ifeq ($(CONFIG_SYS_GENERIC_BOARD),)
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COBJS-y += hang_spl.o
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endif
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endif # CONFIG_SPL_BUILD
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COBJS-y += interrupts.o
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COBJS-y += reset.o
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SRCS := $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \
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$(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
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LGOBJS := $(addprefix $(obj),$(GLSOBJS)) \
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$(addprefix $(obj),$(GLCOBJS))
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# Always build libarm.o
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TARGETS := $(LIB)
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# Build private libgcc only when asked for
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ifdef USE_PRIVATE_LIBGCC
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TARGETS += $(LIBGCC)
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endif
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# For EABI conformant tool chains, provide eabi_compat()
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ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS)))
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TARGETS += $(obj)eabi_compat.o
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endif
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all: $(TARGETS)
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$(LIB): $(obj).depend $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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$(LIBGCC): $(obj).depend $(LGOBJS)
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$(call cmd_link_o_target, $(LGOBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -1,142 +0,0 @@
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.macro ARM_DIV_BODY dividend, divisor, result, curbit
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#if __LINUX_ARM_ARCH__ >= 5
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clz \curbit, \divisor
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clz \result, \dividend
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sub \result, \curbit, \result
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mov \curbit, #1
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mov \divisor, \divisor, lsl \result
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mov \curbit, \curbit, lsl \result
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mov \result, #0
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#else
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@ Initially shift the divisor left 3 bits if possible,
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@ set curbit accordingly. This allows for curbit to be located
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@ at the left end of each 4 bit nibbles in the division loop
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@ to save one loop in most cases.
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tst \divisor, #0xe0000000
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moveq \divisor, \divisor, lsl #3
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moveq \curbit, #8
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movne \curbit, #1
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@ Unless the divisor is very big, shift it up in multiples of
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@ four bits, since this is the amount of unwinding in the main
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@ division loop. Continue shifting until the divisor is
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@ larger than the dividend.
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1: cmp \divisor, #0x10000000
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cmplo \divisor, \dividend
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movlo \divisor, \divisor, lsl #4
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movlo \curbit, \curbit, lsl #4
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blo 1b
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@ For very big divisors, we must shift it a bit at a time, or
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@ we will be in danger of overflowing.
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1: cmp \divisor, #0x80000000
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cmplo \divisor, \dividend
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movlo \divisor, \divisor, lsl #1
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movlo \curbit, \curbit, lsl #1
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blo 1b
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mov \result, #0
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#endif
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@ Division loop
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1: cmp \dividend, \divisor
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subhs \dividend, \dividend, \divisor
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orrhs \result, \result, \curbit
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cmp \dividend, \divisor, lsr #1
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subhs \dividend, \dividend, \divisor, lsr #1
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orrhs \result, \result, \curbit, lsr #1
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cmp \dividend, \divisor, lsr #2
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subhs \dividend, \dividend, \divisor, lsr #2
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orrhs \result, \result, \curbit, lsr #2
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cmp \dividend, \divisor, lsr #3
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subhs \dividend, \dividend, \divisor, lsr #3
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orrhs \result, \result, \curbit, lsr #3
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cmp \dividend, #0 @ Early termination?
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movnes \curbit, \curbit, lsr #4 @ No, any more bits to do?
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movne \divisor, \divisor, lsr #4
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bne 1b
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.endm
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.macro ARM_DIV2_ORDER divisor, order
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#if __LINUX_ARM_ARCH__ >= 5
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clz \order, \divisor
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rsb \order, \order, #31
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#else
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cmp \divisor, #(1 << 16)
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movhs \divisor, \divisor, lsr #16
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movhs \order, #16
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movlo \order, #0
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cmp \divisor, #(1 << 8)
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movhs \divisor, \divisor, lsr #8
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addhs \order, \order, #8
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cmp \divisor, #(1 << 4)
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movhs \divisor, \divisor, lsr #4
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addhs \order, \order, #4
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cmp \divisor, #(1 << 2)
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addhi \order, \order, #3
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addls \order, \order, \divisor, lsr #1
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#endif
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.endm
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.align 5
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.globl __divsi3
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.globl __aeabi_idiv
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__divsi3:
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__aeabi_idiv:
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cmp r1, #0
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eor ip, r0, r1 @ save the sign of the result.
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beq Ldiv0
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rsbmi r1, r1, #0 @ loops below use unsigned.
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subs r2, r1, #1 @ division by 1 or -1 ?
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beq 10f
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movs r3, r0
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rsbmi r3, r0, #0 @ positive dividend value
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cmp r3, r1
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bls 11f
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tst r1, r2 @ divisor is power of 2 ?
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beq 12f
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ARM_DIV_BODY r3, r1, r0, r2
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cmp ip, #0
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rsbmi r0, r0, #0
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mov pc, lr
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10: teq ip, r0 @ same sign ?
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rsbmi r0, r0, #0
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mov pc, lr
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11: movlo r0, #0
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moveq r0, ip, asr #31
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orreq r0, r0, #1
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mov pc, lr
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12: ARM_DIV2_ORDER r1, r2
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cmp ip, #0
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mov r0, r3, lsr r2
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rsbmi r0, r0, #0
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mov pc, lr
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Ldiv0:
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str lr, [sp, #-4]!
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bl __div0
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mov r0, #0 @ About as wrong as it could be.
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ldr pc, [sp], #4
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@ -1,93 +0,0 @@
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/* # 1 "libgcc1.S" */
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@ libgcc1 routines for ARM cpu.
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@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
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dividend .req r0
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divisor .req r1
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result .req r2
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curbit .req r3
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/* ip .req r12 */
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/* sp .req r13 */
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/* lr .req r14 */
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/* pc .req r15 */
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.text
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.globl __udivsi3
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.type __udivsi3 ,function
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.globl __aeabi_uidiv
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.type __aeabi_uidiv ,function
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.align 0
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__udivsi3:
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__aeabi_uidiv:
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cmp divisor, #0
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beq Ldiv0
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mov curbit, #1
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mov result, #0
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cmp dividend, divisor
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bcc Lgot_result
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Loop1:
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@ Unless the divisor is very big, shift it up in multiples of
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@ four bits, since this is the amount of unwinding in the main
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@ division loop. Continue shifting until the divisor is
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@ larger than the dividend.
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cmp divisor, #0x10000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #4
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movcc curbit, curbit, lsl #4
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bcc Loop1
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Lbignum:
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@ For very big divisors, we must shift it a bit at a time, or
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@ we will be in danger of overflowing.
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cmp divisor, #0x80000000
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cmpcc divisor, dividend
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movcc divisor, divisor, lsl #1
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movcc curbit, curbit, lsl #1
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bcc Lbignum
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Loop3:
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@ Test for possible subtractions, and note which bits
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@ are done in the result. On the final pass, this may subtract
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@ too much from the dividend, but the result will be ok, since the
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@ "bit" will have been shifted out at the bottom.
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cmp dividend, divisor
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subcs dividend, dividend, divisor
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orrcs result, result, curbit
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cmp dividend, divisor, lsr #1
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subcs dividend, dividend, divisor, lsr #1
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orrcs result, result, curbit, lsr #1
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cmp dividend, divisor, lsr #2
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subcs dividend, dividend, divisor, lsr #2
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orrcs result, result, curbit, lsr #2
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cmp dividend, divisor, lsr #3
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subcs dividend, dividend, divisor, lsr #3
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orrcs result, result, curbit, lsr #3
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cmp dividend, #0 @ Early termination?
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movnes curbit, curbit, lsr #4 @ No, any more bits to do?
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movne divisor, divisor, lsr #4
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bne Loop3
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Lgot_result:
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mov r0, result
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mov pc, lr
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Ldiv0:
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str lr, [sp, #-4]!
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bl __div0 (PLT)
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mov r0, #0 @ about as wrong as it could be
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ldmia sp!, {pc}
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.size __udivsi3 , . - __udivsi3
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.globl __aeabi_uidivmod
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__aeabi_uidivmod:
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stmfd sp!, {r0, r1, ip, lr}
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bl __aeabi_uidiv
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ldmfd sp!, {r1, r2, ip, lr}
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mul r3, r0, r2
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sub r1, r1, r3
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mov pc, lr
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.globl __aeabi_idivmod
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__aeabi_idivmod:
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stmfd sp!, {r0, r1, ip, lr}
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bl __aeabi_idiv
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ldmfd sp!, {r1, r2, ip, lr}
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mul r3, r0, r2
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sub r1, r1, r3
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mov pc, lr
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@ -1,157 +0,0 @@
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/*
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* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*/
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/*
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* A, Q = r0 + (r1 << 32)
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* B, R = r2 + (r3 << 32)
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* A / B = Q ... R
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*/
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.text
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.global __aeabi_uldivmod
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.type __aeabi_uldivmod, function
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.align 0
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A_0 .req r0
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A_1 .req r1
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B_0 .req r2
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B_1 .req r3
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C_0 .req r4
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C_1 .req r5
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D_0 .req r6
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D_1 .req r7
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Q_0 .req r0
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Q_1 .req r1
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R_0 .req r2
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R_1 .req r3
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__aeabi_uldivmod:
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stmfd sp!, {r4, r5, r6, r7, lr}
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@ Test if B == 0
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orrs ip, B_0, B_1 @ Z set -> B == 0
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beq L_div_by_0
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@ Test if B is power of 2: (B & (B - 1)) == 0
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subs C_0, B_0, #1
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sbc C_1, B_1, #0
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tst C_0, B_0
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tsteq B_1, C_1
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beq L_pow2
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@ Test if A_1 == B_1 == 0
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orrs ip, A_1, B_1
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beq L_div_32_32
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L_div_64_64:
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mov C_0, #1
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mov C_1, #0
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@ D_0 = clz A
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teq A_1, #0
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clz D_0, A_1
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clzeq ip, A_0
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addeq D_0, D_0, ip
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@ D_1 = clz B
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teq B_1, #0
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clz D_1, B_1
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clzeq ip, B_0
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addeq D_1, D_1, ip
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@ if clz B - clz A > 0
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subs D_0, D_1, D_0
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bls L_done_shift
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@ B <<= (clz B - clz A)
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subs D_1, D_0, #32
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rsb ip, D_0, #32
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movmi B_1, B_1, lsl D_0
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orrmi B_1, B_1, B_0, lsr ip
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movpl B_1, B_0, lsl D_1
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mov B_0, B_0, lsl D_0
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@ C = 1 << (clz B - clz A)
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movmi C_1, C_1, lsl D_0
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orrmi C_1, C_1, C_0, lsr ip
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movpl C_1, C_0, lsl D_1
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mov C_0, C_0, lsl D_0
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L_done_shift:
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mov D_0, #0
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mov D_1, #0
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@ C: current bit; D: result
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L_subtract:
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@ if A >= B
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cmp A_1, B_1
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cmpeq A_0, B_0
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bcc L_update
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@ A -= B
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subs A_0, A_0, B_0
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sbc A_1, A_1, B_1
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@ D |= C
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orr D_0, D_0, C_0
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orr D_1, D_1, C_1
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L_update:
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@ if A == 0: break
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orrs ip, A_1, A_0
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beq L_exit
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@ C >>= 1
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movs C_1, C_1, lsr #1
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movs C_0, C_0, rrx
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@ if C == 0: break
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orrs ip, C_1, C_0
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beq L_exit
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@ B >>= 1
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movs B_1, B_1, lsr #1
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mov B_0, B_0, rrx
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b L_subtract
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L_exit:
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@ Note: A, B & Q, R are aliases
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mov R_0, A_0
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mov R_1, A_1
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mov Q_0, D_0
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mov Q_1, D_1
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ldmfd sp!, {r4, r5, r6, r7, pc}
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L_div_32_32:
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@ Note: A_0 & r0 are aliases
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@ Q_1 r1
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mov r1, B_0
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bl __aeabi_uidivmod
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mov R_0, r1
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mov R_1, #0
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mov Q_1, #0
|
||||
ldmfd sp!, {r4, r5, r6, r7, pc}
|
||||
|
||||
L_pow2:
|
||||
@ Note: A, B and Q, R are aliases
|
||||
@ R = A & (B - 1)
|
||||
and C_0, A_0, C_0
|
||||
and C_1, A_1, C_1
|
||||
@ Q = A >> log2(B)
|
||||
@ Note: B must not be 0 here!
|
||||
clz D_0, B_0
|
||||
add D_1, D_0, #1
|
||||
rsbs D_0, D_0, #31
|
||||
bpl L_1
|
||||
clz D_0, B_1
|
||||
rsb D_0, D_0, #31
|
||||
mov A_0, A_1, lsr D_0
|
||||
add D_0, D_0, #32
|
||||
L_1:
|
||||
movpl A_0, A_0, lsr D_0
|
||||
orrpl A_0, A_0, A_1, lsl D_1
|
||||
mov A_1, A_1, lsr D_0
|
||||
@ Mov back C to R
|
||||
mov R_0, C_0
|
||||
mov R_1, C_1
|
||||
ldmfd sp!, {r4, r5, r6, r7, pc}
|
||||
|
||||
L_div_by_0:
|
||||
bl __div0
|
||||
@ As wrong as it could be
|
||||
mov Q_0, #0
|
||||
mov Q_1, #0
|
||||
mov R_0, #0
|
||||
mov R_1, #0
|
||||
ldmfd sp!, {r4, r5, r6, r7, pc}
|
|
@ -1,5 +0,0 @@
|
|||
void __div0(void); // called from asm so no need for a prototype in a header
|
||||
void __div0(void)
|
||||
{
|
||||
// div by zero
|
||||
}
|
Loading…
Reference in New Issue