AGESA,binaryPI: Fix stack location on entry to romstage
For BSP CPU, set up stack location to match the symbol from car.ld. For AP CPUs the stack is located outside _car_region and is currently not accounted for in the linker scripts. Change-Id: I0ec84ae4e73ecca5034f799cdc2a5c1056ad8b74 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37351 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -22,6 +22,7 @@
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*/
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#include "gcccar.inc"
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#include <cpu/x86/lapic_def.h>
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#include <cpu/x86/post_code.h>
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.code32
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@ -36,6 +37,19 @@ _cache_as_ram_setup:
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AMD_ENABLE_STACK
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/*
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* Set up bootblock stack on BSP.
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* AMD_ENABLE_STACK macro sets up a stack for BSP at BSP_STACK_BASE_ADDR
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* which is 0x30000 (_car_region_end), but for C bootblock the stack
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* begins at _ecar_stack (see arch/x86/car.ld)
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*/
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mov $LAPIC_BASE_MSR, %ecx
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rdmsr
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test $LAPIC_BASE_MSR_BOOTSTRAP_PROCESSOR, %eax
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jz ap_entry
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mov $_ecar_stack, %esp
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/* Align the stack. */
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and $0xFFFFFFF0, %esp
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@ -47,11 +61,19 @@ _cache_as_ram_setup:
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pushl %eax
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call romstage_main
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/* Should never see this postcode */
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post_code(0xae)
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/* Never reached. */
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stop:
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post_code(POST_DEAD_CODE)
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hlt
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jmp stop
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ap_entry:
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/* Align the stack for call to ap_romstage_main() */
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and $0xfffffff0, %esp
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call ap_romstage_main
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/* Never reached. */
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jmp stop
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_cache_as_ram_setup_end:
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@ -39,7 +39,7 @@ static void fill_sysinfo(struct sysinfo *cb)
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agesa_set_interface(cb);
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}
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static void bsp_romstage_main(void)
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asmlinkage void romstage_main(unsigned long bist)
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{
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struct postcar_frame pcf;
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struct sysinfo romstage_state;
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@ -99,7 +99,7 @@ static void bsp_romstage_main(void)
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/* We do not return. */
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}
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static void __noreturn ap_romstage_main(void)
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asmlinkage void ap_romstage_main(void)
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{
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struct sysinfo romstage_state;
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struct sysinfo *cb = &romstage_state;
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@ -116,11 +116,3 @@ static void __noreturn ap_romstage_main(void)
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/* Not reached. */
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halt();
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}
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asmlinkage void romstage_main(unsigned long bist)
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{
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if (boot_cpu())
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bsp_romstage_main();
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else
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ap_romstage_main();
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}
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@ -4,5 +4,6 @@
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#include <arch/cpu.h>
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asmlinkage void romstage_main(unsigned long bist);
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asmlinkage void ap_romstage_main(void);
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#endif
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