drop USE_INIT should be USE_PRINTK_IN_CAR here.
uint32_t should be u32 DEBUG_RAM_SETUP was failing on some northbridges Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5338 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
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b01fe696d4
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@ -39,7 +39,7 @@ static void dump_pci_device(unsigned dev)
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for(i = 0; i < 256; i++) {
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unsigned char val;
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if ((i & 0x0f) == 0) {
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, "\r\n%02x:",i);
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#else
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print_debug("\r\n");
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@ -48,7 +48,7 @@ static void dump_pci_device(unsigned dev)
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#endif
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}
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val = pci_read_config8(dev, i);
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, " %02x", val);
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#else
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print_debug_char(' ');
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@ -101,7 +101,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
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device = ctrl->channel0[i];
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if (device) {
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int j;
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device);
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#else
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print_debug("dimm: ");
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@ -113,7 +113,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
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int status;
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unsigned char byte;
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if ((j & 0xf) == 0) {
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, "\r\n%02x: ", j);
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#else
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print_debug("\r\n");
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@ -126,7 +126,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
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break;
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}
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byte = status & 0xff;
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, "%02x ", byte);
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#else
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print_debug_hex8(byte);
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@ -138,7 +138,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
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device = ctrl->channel1[i];
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if (device) {
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int j;
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
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#else`
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print_debug("dimm: ");
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@ -150,7 +150,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
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int status;
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unsigned char byte;
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if ((j & 0xf) == 0) {
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, "\r\n%02x: ", j);
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#else
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print_debug("\r\n");
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@ -163,7 +163,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
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break;
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}
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byte = status & 0xff;
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, "%02x ", byte);
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#else
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print_debug_hex8(byte);
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@ -181,7 +181,7 @@ static void dump_smbus_registers(void)
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for(device = 1; device < 0x80; device++) {
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int j;
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if( smbus_read_byte(device, 0) < 0 ) continue;
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, "smbus: %02x", device);
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#else
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print_debug("smbus: ");
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@ -195,7 +195,7 @@ static void dump_smbus_registers(void)
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break;
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}
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if ((j & 0xf) == 0) {
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, "\r\n%02x: ",j);
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#else
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print_debug("\r\n");
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@ -204,7 +204,7 @@ static void dump_smbus_registers(void)
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#endif
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}
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byte = status & 0xff;
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, "%02x ", byte);
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#else
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print_debug_hex8(byte);
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@ -219,7 +219,7 @@ static void dump_io_resources(unsigned port)
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{
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int i;
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, "%04x:\r\n", port);
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#else
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print_debug_hex16(port);
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@ -228,7 +228,7 @@ static void dump_io_resources(unsigned port)
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for(i=0;i<256;i++) {
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uint8_t val;
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if ((i & 0x0f) == 0) {
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, "%02x:", i);
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#else
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print_debug_hex8(i);
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@ -236,7 +236,7 @@ static void dump_io_resources(unsigned port)
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#endif
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}
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val = inb(port);
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, " %02x",val);
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#else
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print_debug_char(' ');
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@ -255,7 +255,7 @@ static void dump_mem(unsigned start, unsigned end)
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print_debug("dump_mem:");
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for(i=start;i<end;i++) {
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if((i & 0xf)==0) {
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, "\r\n%08x:", i);
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#else
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print_debug("\r\n");
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@ -263,7 +263,7 @@ static void dump_mem(unsigned start, unsigned end)
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print_debug(":");
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#endif
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}
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#if CONFIG_USE_INIT
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#if CONFIG_USE_PRINTK_IN_CAR
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printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
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#else
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print_debug(" ");
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@ -36,7 +36,9 @@ Macros and definitions.
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#define PRINT_DEBUG_HEX8(x) print_debug_hex8(x)
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#define PRINT_DEBUG_HEX16(x) print_debug_hex16(x)
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#define PRINT_DEBUG_HEX32(x) print_debug_hex32(x)
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#define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0))
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// no dump_pci_device in src/northbridge/intel/i440bx
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// #define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0))
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#define DUMPNORTH()
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#else
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#define PRINT_DEBUG(x)
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#define PRINT_DEBUG_HEX8(x)
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@ -208,8 +208,6 @@ static struct device_operations cpu_bus_ops = {
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static void enable_dev(struct device *dev)
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{
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struct device_path path;
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/* Set the operations if it is a special bus type */
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if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
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dev->ops = &pci_domain_ops;
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@ -30,12 +30,17 @@ Macros and definitions.
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-----------------------------------------------------------------------------*/
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/* Debugging macros. */
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#define HAVE_ENOUGH_REGISTERS 0 /* Don't have enough registers to compile all
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* debugging code with ROMCC
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*/
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#if CONFIG_DEBUG_RAM_SETUP
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#define PRINT_DEBUG(x) print_debug(x)
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#define PRINT_DEBUG_HEX8(x) print_debug_hex8(x)
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#define PRINT_DEBUG_HEX16(x) print_debug_hex16(x)
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#define PRINT_DEBUG_HEX32(x) print_debug_hex32(x)
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#define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0))
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// no dump_pci_device in src/northbridge/intel/i82810/
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// #define DUMPNORTH() dump_pci_device(PCI_DEV(0, 0, 0))
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#define DUMPNORTH()
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#else
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#define PRINT_DEBUG(x)
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#define PRINT_DEBUG_HEX8(x)
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@ -138,26 +143,29 @@ static void do_ram_command(u8 command)
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drp = (drp >> (i * 4)) & 0x0f;
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dimm_size = translate_i82810_to_mb[drp];
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addr = (dimm_start * 1024 * 1024) + addr_offset;
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if (dimm_size) {
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addr = (dimm_start * 1024 * 1024) + addr_offset;
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#if HAVE_ENOUGH_REGISTERS
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PRINT_DEBUG(" Sending RAM command 0x");
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PRINT_DEBUG_HEX8(reg8);
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PRINT_DEBUG(" to 0x");
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PRINT_DEBUG_HEX32(addr);
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PRINT_DEBUG("\r\n");
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#endif
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read32(addr);
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}
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dimm_bank = translate_i82810_to_bank[drp];
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addr = ((dimm_start + dimm_bank) * 1024 * 1024) + addr_offset;
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if (dimm_bank) {
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addr = ((dimm_start + dimm_bank) * 1024 * 1024) + addr_offset;
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#if HAVE_ENOUGH_REGISTERS
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PRINT_DEBUG(" Sending RAM command 0x");
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PRINT_DEBUG_HEX8(reg8);
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PRINT_DEBUG(" to 0x");
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PRINT_DEBUG_HEX32(addr);
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PRINT_DEBUG("\r\n");
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#endif
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read32(addr);
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}
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@ -67,9 +67,9 @@ Macros and definitions.
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DIMM-initialization functions.
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-----------------------------------------------------------------------------*/
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static void do_ram_command(uint32_t command)
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static void do_ram_command(u32 command)
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{
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uint32_t reg32;
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u32 reg32;
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/* Configure the RAM command. */
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reg32 = pci_read_config32(NORTHBRIDGE, DRC);
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PRINT_DEBUG("\r\n");
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}
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static void ram_read32(uint8_t dimm_start, uint32_t offset)
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static void ram_read32(u8 dimm_start, u32 offset)
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{
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if (offset == 0x55aa55aa) {
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PRINT_DEBUG(" Reading RAM at 0x");
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static void initialize_dimm_rows(void)
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{
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int i, row;
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uint8_t dimm_start, dimm_end;
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u8 dimm_start, dimm_end;
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unsigned device;
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dimm_start = 0;
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@ -487,7 +487,7 @@ static void sdram_set_registers(void)
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static void northbridge_set_registers(void)
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{
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uint16_t value;
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u16 value;
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int igd_memory = 0;
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PRINT_DEBUG("Setting initial nothbridge registers....\r\n");
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@ -542,7 +542,7 @@ static void northbridge_set_registers(void)
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static void sdram_initialize(void)
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{
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int i;
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uint32_t reg32;
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u32 reg32;
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/* Setup Initial SDRAM Registers */
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sdram_set_registers();
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