soc/amd/{cezanne,common}: Enable IOMMU PCIe Device

This change only enables the IOMMU device. We still require the IVRS
table to take advantage of the IOMMU. This will happen when the picasso
IVRS code is moved into common.

BUG=b:190515051
TEST=lspci shows IOMMU device
00:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Device 1631

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I5c7cae3d25af5a45d48658ffa948a2856adc4346
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55737
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Raul E Rangel 2021-06-09 13:36:10 -06:00 committed by Felix Held
parent c4ca2f6396
commit 3acc515bef
3 changed files with 4 additions and 0 deletions

View File

@ -186,6 +186,8 @@ chip soc/amd/cezanne
}"
device domain 0 on
device ref iommu on end
device ref gpp_bridge_0 on
chip drivers/wifi/generic
register "wake" = "GEVENT_8"

View File

@ -47,6 +47,7 @@ config SOC_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_GRAPHICS
select SOC_AMD_COMMON_BLOCK_HAS_ESPI
select SOC_AMD_COMMON_BLOCK_I2C
select SOC_AMD_COMMON_BLOCK_IOMMU
select SOC_AMD_COMMON_BLOCK_LPC
select SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA
select SOC_AMD_COMMON_BLOCK_NONCAR

View File

@ -42,6 +42,7 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_AMD_15H_MODEL_303F_NB_IOMMU,
PCI_DEVICE_ID_AMD_15H_MODEL_707F_NB_IOMMU,
PCI_DEVICE_ID_AMD_17H_MODEL_1020_NB_IOMMU,
PCI_DEVICE_ID_AMD_17H_MODEL_606F_NB_IOMMU,
0
};