soc/amd/{cezanne,common}: Enable IOMMU PCIe Device
This change only enables the IOMMU device. We still require the IVRS table to take advantage of the IOMMU. This will happen when the picasso IVRS code is moved into common. BUG=b:190515051 TEST=lspci shows IOMMU device 00:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Device 1631 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I5c7cae3d25af5a45d48658ffa948a2856adc4346 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55737 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -186,6 +186,8 @@ chip soc/amd/cezanne
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}"
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device domain 0 on
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device ref iommu on end
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device ref gpp_bridge_0 on
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chip drivers/wifi/generic
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register "wake" = "GEVENT_8"
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@ -47,6 +47,7 @@ config SOC_SPECIFIC_OPTIONS
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select SOC_AMD_COMMON_BLOCK_GRAPHICS
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select SOC_AMD_COMMON_BLOCK_HAS_ESPI
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select SOC_AMD_COMMON_BLOCK_I2C
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select SOC_AMD_COMMON_BLOCK_IOMMU
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select SOC_AMD_COMMON_BLOCK_LPC
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select SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA
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select SOC_AMD_COMMON_BLOCK_NONCAR
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@ -42,6 +42,7 @@ static const unsigned short pci_device_ids[] = {
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PCI_DEVICE_ID_AMD_15H_MODEL_303F_NB_IOMMU,
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PCI_DEVICE_ID_AMD_15H_MODEL_707F_NB_IOMMU,
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PCI_DEVICE_ID_AMD_17H_MODEL_1020_NB_IOMMU,
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PCI_DEVICE_ID_AMD_17H_MODEL_606F_NB_IOMMU,
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0
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};
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