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mb/google/zork: remove redundant IRQ routing configuration 

The PIC and APIC IRQ routing tables are pre-populated with PIRQ_NC in
init_tables(), so the fch_pirq table entries where both IRQ numbers are
set to fch_pirq are redundant and can be removed.

Change-Id: I0d9b4f25e12a66cf86d1ad541955c3d2fe336c5a
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42568
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Felix Held 2020-06-19 20:18:12 +02:00 committed by Felix Held
parent fca4535acf
commit 3b1f21e4f2
1 changed files with 0 additions and 28 deletions
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28
src/mainboard/google/zork/mainboard.c
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@ -79,41 +79,13 @@ static const struct fch_apic_routing {
{ PIRQ_B, 6, 17 }, { PIRQ_B, 6, 17 },
{ PIRQ_C, 14, 18 }, { PIRQ_C, 14, 18 },
{ PIRQ_D, 15, 19 }, { PIRQ_D, 15, 19 },
{ PIRQ_E, PIRQ_NC, PIRQ_NC },
{ PIRQ_F, PIRQ_NC, PIRQ_NC },
{ PIRQ_G, PIRQ_NC, PIRQ_NC },
{ PIRQ_H, PIRQ_NC, PIRQ_NC },
{ PIRQ_SIRQA, PIRQ_NC, PIRQ_NC },
{ PIRQ_SIRQB, PIRQ_NC, PIRQ_NC },
{ PIRQ_SIRQC, PIRQ_NC, PIRQ_NC },
{ PIRQ_SIRQD, PIRQ_NC, PIRQ_NC },
{ PIRQ_SCI, 9, 9 }, { PIRQ_SCI, 9, 9 },
{ PIRQ_SMBUS, PIRQ_NC, PIRQ_NC },
{ PIRQ_ASF, PIRQ_NC, PIRQ_NC },
{ PIRQ_PMON, PIRQ_NC, PIRQ_NC },
{ PIRQ_SD, PIRQ_NC, PIRQ_NC },
{ PIRQ_SDIO, PIRQ_NC, PIRQ_NC },
{ PIRQ_CIR, PIRQ_NC, PIRQ_NC },
{ PIRQ_GPIOA, PIRQ_NC, PIRQ_NC },
{ PIRQ_GPIOB, PIRQ_NC, PIRQ_NC },
{ PIRQ_GPIOC, PIRQ_NC, PIRQ_NC },
{ PIRQ_SATA, PIRQ_NC, PIRQ_NC },
{ PIRQ_EMMC, 5, 5 }, { PIRQ_EMMC, 5, 5 },
{ PIRQ_GPP0, PIRQ_NC, PIRQ_NC },
{ PIRQ_GPP1, PIRQ_NC, PIRQ_NC },
{ PIRQ_GPP2, PIRQ_NC, PIRQ_NC },
{ PIRQ_GPP3, PIRQ_NC, PIRQ_NC },
{ PIRQ_GPIO, 7, 7 }, { PIRQ_GPIO, 7, 7 },
{ PIRQ_I2C0, PIRQ_NC, PIRQ_NC },
{ PIRQ_I2C1, PIRQ_NC, PIRQ_NC },
{ PIRQ_I2C2, 10, 10 }, { PIRQ_I2C2, 10, 10 },
{ PIRQ_I2C3, 11, 11 }, { PIRQ_I2C3, 11, 11 },
{ PIRQ_UART0, 4, 4 }, { PIRQ_UART0, 4, 4 },
{ PIRQ_UART1, 3, 3 }, { PIRQ_UART1, 3, 3 },
{ PIRQ_I2C4, PIRQ_NC, PIRQ_NC },
{ PIRQ_I2C5, PIRQ_NC, PIRQ_NC },
{ PIRQ_UART2, PIRQ_NC, PIRQ_NC },
{ PIRQ_UART3, PIRQ_NC, PIRQ_NC },
/* The MISC registers are not interrupt numbers */ /* The MISC registers are not interrupt numbers */
{ PIRQ_MISC, 0xfa, 0x00 }, { PIRQ_MISC, 0xfa, 0x00 },