Documentation/getting_started: Fix typo
Change-Id: I41571c45719dfade49a021b6bafe80afdcb7b581 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41223 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -10,7 +10,7 @@ coreboot consists of multiple stages that are compiled as separate binaries and
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are inserted into the CBFS with custom compression. The bootblock usually doesn't
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are inserted into the CBFS with custom compression. The bootblock usually doesn't
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have compression while the ramstage and payload are compressed with LZMA.
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have compression while the ramstage and payload are compressed with LZMA.
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Each stage loads the next stage a given address (possibly decompressing it).
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Each stage loads the next stage at given address (possibly decompressing it).
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Some stages are relocatable and can be placed anywhere in DRAM. Those stages are
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Some stages are relocatable and can be placed anywhere in DRAM. Those stages are
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usually cached in CBMEM for faster loading times on ACPI S3 resume.
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usually cached in CBMEM for faster loading times on ACPI S3 resume.
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