Documentation/getting_started: Fix typo

Change-Id: I41571c45719dfade49a021b6bafe80afdcb7b581
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41223
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Paul Menzel 2020-05-10 22:00:42 +02:00 committed by Patrick Georgi
parent 5e64f01e79
commit 3b3512941b
1 changed files with 1 additions and 1 deletions

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@ -10,7 +10,7 @@ coreboot consists of multiple stages that are compiled as separate binaries and
are inserted into the CBFS with custom compression. The bootblock usually doesn't are inserted into the CBFS with custom compression. The bootblock usually doesn't
have compression while the ramstage and payload are compressed with LZMA. have compression while the ramstage and payload are compressed with LZMA.
Each stage loads the next stage a given address (possibly decompressing it). Each stage loads the next stage at given address (possibly decompressing it).
Some stages are relocatable and can be placed anywhere in DRAM. Those stages are Some stages are relocatable and can be placed anywhere in DRAM. Those stages are
usually cached in CBMEM for faster loading times on ACPI S3 resume. usually cached in CBMEM for faster loading times on ACPI S3 resume.