riscv: add spin lock support

Add spin lock support for riscv.

Change-Id: I7e93fb8b35c4452f0fe3f7f4bcc6f7aa4e042451
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/27356
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
This commit is contained in:
Xiang Wang 2018-07-08 10:01:14 +08:00 committed by Patrick Georgi
parent 33354ddaa8
commit 3b5351d044
1 changed files with 28 additions and 0 deletions

View File

@ -1,6 +1,8 @@
/* /*
* This file is part of the coreboot project. * This file is part of the coreboot project.
* *
* Copyright (C) 2018 HardenedLinux.
*
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License. * the Free Software Foundation; version 2 of the License.
@ -10,3 +12,29 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#ifndef ARCH_SMP_SPINLOCK_H
#define ARCH_SMP_SPINLOCK_H
#include <arch/encoding.h>
#include <arch/smp/atomic.h>
#define barrier() { asm volatile ("fence" ::: "memory"); }
typedef struct {
volatile atomic_t lock;
} spinlock_t;
static inline void spinlock_lock(spinlock_t *lock)
{
while (atomic_swap(&lock->lock, -1))
;
barrier();
}
static inline void spinlock_unlock(spinlock_t *lock)
{
barrier();
atomic_set(&lock->lock, 0);
}
#endif // ARCH_SMP_SPINLOCK_H