Fix register corruption during Intel Microcode update

Another bug in the Intel microcode update code that existed since we switched
to LinuxBIOSv2 in 2004:

The inline assembly code that reads the CPU revision from an MSR after running
cpuid(1) trashes registers EBX and ECX. Only ECX was mentioned in the clobber
list. C code running after this function could silently access completely wrong
data, which resulted in the wrong date being printed on microcode updates (and
potentially other issues happening until the C code writes to EBX again)

Change-Id: Ida733fa1747565ec9824d3a37d08b1a73cd8355f
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/996
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>

src/cpu/intel/microcode/microcode.c

@@ -63,7 +63,7 @@ static inline u32 read_microcode_rev(void)
 		"=a" (msr.lo), "=d" (msr.hi)
 		: /* inputs */
 		: /* trashed */
-		 "ecx"
+		 "ebx", "ecx"
 	);
 	return msr.hi;
 }