mb/google/volteer: Fix GPP_E12 definition

GPP_E12 should not be defined in the baseboard as its use is
determined by the variant. For legacy reasons, we still have GPP_E12
defined in early_gpio but should not. Malefor and volteer* have the
same GPP_E12 definition, but that is a misconfiguration. I think that
was a copy-paste that slipped through the reviews.

BUG=b:157597158
TEST=volteer2 boots to the OS

Change-Id: Ic3ef864827aa94b0b96e335565119f3d5d008837
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45197
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Caveh Jalali 2020-09-09 02:08:26 -07:00 committed by Patrick Georgi
parent a545d30831
commit 3b616e4bde
4 changed files with 0 additions and 12 deletions

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@ -422,9 +422,6 @@ static const struct pad_config early_gpio_table[] = {
/* C21 : UART2_TXD ==> H1_PCH_INT_ODL */ /* C21 : UART2_TXD ==> H1_PCH_INT_ODL */
PAD_CFG_GPI_APIC(GPP_C21, NONE, PLTRST, LEVEL, INVERT), PAD_CFG_GPI_APIC(GPP_C21, NONE, PLTRST, LEVEL, INVERT),
/* E12 : SPI1_MISO_IO1 ==> EN_PP3300_SSD */
PAD_CFG_GPO(GPP_E12, 1, DEEP),
/* F11 : THC1_SPI2_CLK ==> EN_PP3300_WWAN */ /* F11 : THC1_SPI2_CLK ==> EN_PP3300_WWAN */
PAD_CFG_GPO(GPP_F11, 1, DEEP), PAD_CFG_GPO(GPP_F11, 1, DEEP),
}; };

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@ -186,9 +186,6 @@ static const struct pad_config early_gpio_table[] = {
/* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */
PAD_CFG_GPO(GPP_D16, 1, DEEP), PAD_CFG_GPO(GPP_D16, 1, DEEP),
/* E12 : SPI1_MISO_IO1 ==> PEN_ALERT_ODL */
PAD_CFG_GPO(GPP_E12, 1, DEEP),
/* H11 : SRCCLKREQ5# ==> WLAN_PERST_L */ /* H11 : SRCCLKREQ5# ==> WLAN_PERST_L */
PAD_CFG_GPO(GPP_H11, 1, DEEP), PAD_CFG_GPO(GPP_H11, 1, DEEP),
}; };

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@ -234,9 +234,6 @@ static const struct pad_config early_gpio_table[] = {
/* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */
PAD_NC(GPP_D16, UP_20K), PAD_NC(GPP_D16, UP_20K),
/* E12 : SPI1_MISO_IO1 ==> EN_PP3300_SSD */
PAD_CFG_GPO(GPP_E12, 1, DEEP),
/* F11 : THC1_SPI2_CLK ==> EN_PP3300_WWAN */ /* F11 : THC1_SPI2_CLK ==> EN_PP3300_WWAN */
PAD_CFG_GPO(GPP_F11, 1, DEEP), PAD_CFG_GPO(GPP_F11, 1, DEEP),
/* F12 : GSXDOUT ==> WWAN_RST_ODL /* F12 : GSXDOUT ==> WWAN_RST_ODL

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@ -234,9 +234,6 @@ static const struct pad_config early_gpio_table[] = {
/* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */
PAD_NC(GPP_D16, UP_20K), PAD_NC(GPP_D16, UP_20K),
/* E12 : SPI1_MISO_IO1 ==> EN_PP3300_SSD */
PAD_CFG_GPO(GPP_E12, 1, DEEP),
/* F11 : THC1_SPI2_CLK ==> EN_PP3300_WWAN */ /* F11 : THC1_SPI2_CLK ==> EN_PP3300_WWAN */
PAD_CFG_GPO(GPP_F11, 1, DEEP), PAD_CFG_GPO(GPP_F11, 1, DEEP),
/* F12 : GSXDOUT ==> WWAN_RST_ODL /* F12 : GSXDOUT ==> WWAN_RST_ODL