soc/amd/picasso: move sb_clk_output_48Mhz from acp to fch

Move sb_clk_output_48Mhz out of acp. It should be called unconditionally.
We may have another device need this clock e.g. superio chip.

BUG=b:174121847
BRANCH=zork
TEST= build passed

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I30ad6c60066f17cc83e7feb40675610f4853a022
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48722
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/soc/amd/picasso/acp.c

@@ -46,9 +46,6 @@ static void init(struct device *dev)
 	/* Enable ACP_PME_EN and ACP_I2S_WAKE_EN for I2S_WAKE event */
 	acp_update32(bar, ACP_I2S_WAKE_EN, WAKE_EN_MASK, !!cfg->acp_i2s_wake_enable);
 	acp_update32(bar, ACP_PME_EN, PME_EN_MASK, !!cfg->acp_pme_enable);
-
-	if (cfg->acp_pin_cfg == I2S_PINS_I2S_TDM)
-		sb_clk_output_48Mhz(); /* Internal connection to I2S */
 }
 
 static const char *acp_acpi_name(const struct device *dev)

src/soc/amd/picasso/fch.c

@@ -237,6 +237,8 @@ void southbridge_init(void *chip_info)
 	al2ahb_clock_gate();
 
 	gpp_clk_setup();
+
+	sb_clk_output_48Mhz();
 }
 
 void southbridge_final(void *chip_info)