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mainboards: Move get_cst_entries() 

Change-Id: I02cfbcb7a340bd574290e4ac486010fc4cbcd3be
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49351
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2021-01-12 15:01:42 +02:00
parent 66c6413c69
commit 3b947e2094
12 changed files with 110 additions and 92 deletions
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2
src/mainboard/apple/macbook21/Makefile.inc
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@ -1,3 +1,5 @@
romstage-y += gpio.c
bootblock-y += early_init.c
romstage-y += early_init.c
ramstage-y += cstates.c

38
src/mainboard/apple/macbook21/cstates.c Normal file
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@ -0,0 +1,38 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpigen.h>
static acpi_cstate_t cst_entries[] = {
{
.ctype = 1,
.latency = 1,
.power = 1000,
.resource = {
.space_id = ACPI_ADDRESS_SPACE_FIXED,
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
.access_size = ACPI_ACCESS_SIZE_UNDEFINED,
.addrl = 0,
.addrh = 0,
}
},
{
.ctype = 2,
.latency = 1,
.power = 500,
.resource = {
.space_id = ACPI_ADDRESS_SPACE_FIXED,
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
.access_size = ACPI_ACCESS_SIZE_UNDEFINED,
.addrl = 0x10,
.addrh = 0,
}
},
};
int get_cst_entries(acpi_cstate_t **entries)
{
*entries = cst_entries;
return ARRAY_SIZE(cst_entries);
}

36
src/mainboard/apple/macbook21/mainboard.c
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@ -2,47 +2,11 @@
#include <device/device.h>
#include <northbridge/intel/i945/i945.h>
#include <acpi/acpigen.h>
#include <drivers/intel/gma/int15.h>
#include <ec/acpi/ec.h>
#define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
static acpi_cstate_t cst_entries[] = {
{
.ctype = 1,
.latency = 1,
.power = 1000,
.resource = {
.space_id = ACPI_ADDRESS_SPACE_FIXED,
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
.access_size = ACPI_ACCESS_SIZE_UNDEFINED,
.addrl = 0,
.addrh = 0,
}
},
{
.ctype = 2,
.latency = 1,
.power = 500,
.resource = {
.space_id = ACPI_ADDRESS_SPACE_FIXED,
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
.access_size = ACPI_ACCESS_SIZE_UNDEFINED,
.addrl = 0x10,
.addrh = 0,
}
},
};
int get_cst_entries(acpi_cstate_t **entries)
{
*entries = cst_entries;
return ARRAY_SIZE(cst_entries);
}
static void mainboard_init(struct device *dev)
{
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, PANEL, 3);

2
src/mainboard/asus/p5ql-em/Makefile.inc
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@ -5,4 +5,6 @@ bootblock-y += early_init.c
romstage-y += gpio.c
romstage-y += early_init.c
ramstage-y += cstates.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads

7
src/mainboard/asus/p5ql-em/acpi_tables.c
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@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpigen.h>
#include <acpi/acpi_gnvs.h>
#include <soc/nvs.h>
@ -12,9 +11,3 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs)
gnvs->mpen = 1; /* Enable Multi Processing */
gnvs->cmap = 0x01; /* Enable COM 1 port */
}
/* TODO: Could work... */
int get_cst_entries(acpi_cstate_t **entries)
{
return 0;
}

9
src/mainboard/asus/p5ql-em/cstates.c Normal file
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@ -0,0 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpigen.h>
/* TODO: Could work... */
int get_cst_entries(acpi_cstate_t **entries)
{
return 0;
}

1
src/mainboard/lenovo/t60/Makefile.inc
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@ -7,3 +7,4 @@ bootblock-y += gpio.c
romstage-y += gpio.c
bootblock-y += early_init.c
romstage-y += early_init.c
ramstage-y += cstates.c

16
src/mainboard/lenovo/t60/cstates.c Normal file
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@ -0,0 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpigen.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
static acpi_cstate_t cst_entries[] = {
{ 1, 1, 1000, { 0x7f, 1, 2, 0, 1, 0 } },
{ 2, 1, 500, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 0 } },
{ 3, 17, 250, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 0 } },
};
int get_cst_entries(acpi_cstate_t **entries)
{
*entries = cst_entries;
return ARRAY_SIZE(cst_entries);
}

12
src/mainboard/lenovo/t60/mainboard.c
View File

@ -12,18 +12,6 @@
#define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
static acpi_cstate_t cst_entries[] = {
{ 1, 1, 1000, { 0x7f, 1, 2, 0, 1, 0 } },
{ 2, 1, 500, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 0 } },
{ 3, 17, 250, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 0 } },
};
int get_cst_entries(acpi_cstate_t **entries)
{
*entries = cst_entries;
return ARRAY_SIZE(cst_entries);
}
static void mainboard_init(struct device *dev)
{
struct southbridge_intel_i82801gx_config *config;

1
src/mainboard/lenovo/x60/Makefile.inc
View File

@ -8,3 +8,4 @@ bootblock-y += gpio.c
romstage-y += gpio.c
bootblock-y += early_init.c
romstage-y += early_init.c
ramstage-y += cstates.c

41
src/mainboard/lenovo/x60/cstates.c Normal file
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@ -0,0 +1,41 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpigen.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
#define MWAIT_RES(state, sub_state) \
{ \
.space_id = ACPI_ADDRESS_SPACE_FIXED, \
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
.access_size = ACPI_ACCESS_SIZE_UNDEFINED, \
.addrl = (((state) << 4) | (sub_state)), \
.addrh = 0, \
}
static acpi_cstate_t cst_entries[] = {
{
.ctype = 1,
.latency = 1,
.power = 1000,
.resource = MWAIT_RES(0, 0),
},
{
.ctype = 2,
.latency = 1,
.power = 500,
.resource = MWAIT_RES(1, 0),
},
{
.ctype = 3,
.latency = 17,
.power = 250,
.resource = MWAIT_RES(2, 0),
},
};
int get_cst_entries(acpi_cstate_t **entries)
{
*entries = cst_entries;
return ARRAY_SIZE(cst_entries);
}

37
src/mainboard/lenovo/x60/mainboard.c
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@ -15,43 +15,6 @@
#define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
#define MWAIT_RES(state, sub_state) \
{ \
.space_id = ACPI_ADDRESS_SPACE_FIXED, \
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
.access_size = ACPI_ACCESS_SIZE_UNDEFINED, \
.addrl = (((state) << 4) | (sub_state)), \
.addrh = 0, \
}
static acpi_cstate_t cst_entries[] = {
{
.ctype = 1,
.latency = 1,
.power = 1000,
.resource = MWAIT_RES(0, 0),
},
{
.ctype = 2,
.latency = 1,
.power = 500,
.resource = MWAIT_RES(1, 0),
},
{
.ctype = 3,
.latency = 17,
.power = 250,
.resource = MWAIT_RES(2, 0),
},
};
int get_cst_entries(acpi_cstate_t **entries)
{
*entries = cst_entries;
return ARRAY_SIZE(cst_entries);
}
static void mainboard_init(struct device *dev)
{
struct device *idedev, *sdhci_dev;