soc/intel/broadwell: Relocate CPU files

Change-Id: Ib2ddce78db21db9c8deac632a77ecd71eb9887c2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46794
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/broadwell/Makefile.inc

@@ -1,24 +1,13 @@
 ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
 
 subdirs-y += romstage
-subdirs-y += ../../../cpu/x86/lapic
-subdirs-y += ../../../cpu/x86/mtrr
-subdirs-y += ../../../cpu/x86/smm
-subdirs-y += ../../../cpu/x86/tsc
-subdirs-y += ../../../cpu/intel/microcode
-subdirs-y += ../../../cpu/intel/turbo
-subdirs-y += ../../../cpu/intel/common
 
+subdirs-y += cpu
 subdirs-y += pch
 
-bootblock-y += bootblock/cpu.c
 bootblock-y += bootblock/systemagent.c
-bootblock-y += ../../../cpu/intel/car/bootblock.c
-bootblock-y += ../../../cpu/intel/car/non-evict/cache_as_ram.S
-bootblock-y += ../../../cpu/x86/early_reset.S
 
 ramstage-y += acpi.c
-ramstage-y += cpu.c
 ramstage-y += finalize.c
 ramstage-y += gma.c
 ramstage-y += memmap.c
@@ -29,18 +18,7 @@ ramstage-y += pei_data.c
 romstage-y += pei_data.c
 ramstage-y += ramstage.c
 ramstage-$(CONFIG_HAVE_REFCODE_BLOB) += refcode.c
-ramstage-y += smmrelocate.c
 ramstage-y += systemagent.c
-bootblock-y += tsc_freq.c
-ramstage-y += tsc_freq.c
-romstage-y += tsc_freq.c
-smm-y      += tsc_freq.c
-postcar-y  += tsc_freq.c
-verstage-y += tsc_freq.c
-
-postcar-y += ../../../cpu/intel/car/non-evict/exit_car.S
-
-cpu_microcode_bins += 3rdparty/blobs/soc/intel/broadwell/microcode.bin
 
 CPPFLAGS_common += -Isrc/soc/intel/broadwell/include
 

src/soc/intel/broadwell/cpu/Makefile.inc

@@ -0,0 +1,29 @@
+subdirs-y += ../../../../cpu/x86/lapic
+subdirs-y += ../../../../cpu/x86/mtrr
+subdirs-y += ../../../../cpu/x86/smm
+subdirs-y += ../../../../cpu/x86/tsc
+subdirs-y += ../../../../cpu/intel/microcode
+subdirs-y += ../../../../cpu/intel/turbo
+subdirs-y += ../../../../cpu/intel/common
+
+bootblock-y += bootblock.c
+bootblock-y += ../../../../cpu/intel/car/bootblock.c
+bootblock-y += ../../../../cpu/intel/car/non-evict/cache_as_ram.S
+bootblock-y += ../../../../cpu/x86/early_reset.S
+
+romstage-y += romstage.c
+romstage-y += ../../../../cpu/intel/car/romstage.c
+
+postcar-y += ../../../../cpu/intel/car/non-evict/exit_car.S
+
+ramstage-y += cpu.c
+ramstage-y += smmrelocate.c
+
+bootblock-y += tsc_freq.c
+ramstage-y += tsc_freq.c
+romstage-y += tsc_freq.c
+smm-y      += tsc_freq.c
+postcar-y  += tsc_freq.c
+verstage-y += tsc_freq.c
+
+cpu_microcode_bins += 3rdparty/blobs/soc/intel/broadwell/microcode.bin

src/soc/intel/broadwell/romstage/Makefile.inc

@@ -1,5 +1,3 @@
-romstage-y += ../../../../cpu/intel/car/romstage.c
-romstage-y += cpu.c
 romstage-y += raminit.c
 romstage-y += report_platform.c
 romstage-y += romstage.c