CBMEM: Tag chipsets with LATE_CBMEM_INIT

In preparation to remove the static CBMEM allocator, tag the chipsets
that still do not implement get_top_of_ram() for romstage.

LATE_CBMEM_INIT also implies BROKEN_CAR_MIGRATE.

Change-Id: Iad359db2e65ac15c54ff6e9635429628e4db6fde
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7850
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)

src/Kconfig

@@ -157,16 +157,17 @@ config INCLUDE_CONFIG_FILE
 	    (empty)                        0x8e480    null         3610440
 
 config EARLY_CBMEM_INIT
-	bool
-	default n
+	def_bool !LATE_CBMEM_INIT
+
+config LATE_CBMEM_INIT
+	def_bool n
 	help
-	  Make coreboot initialize the CBMEM structures while running in ROM
-	  stage. This is useful when the ROM stage wants to communicate
-	  some, for instance, execution timestamps. It needs support in
-	  romstage.c and should be enabled by the board's Kconfig.
+	  Enable this in chipset's Kconfig if northbridge does not implement
+	  early get_top_of_ram() call for romstage. CBMEM tables will be
+	  allocated late in ramstage, after PCI devices resources are known.
 
 config BROKEN_CAR_MIGRATE
-	def_bool !EARLY_CBMEM_INIT
+	def_bool LATE_CBMEM_INIT
 	help
 	  Many boards use CAR_GLOBAL but have no EARLY_CBMEM_INIT and
 	  manage CAR migration on S3 resume path only. Couple boards use

src/arch/x86/boot/cbmem.c

@@ -56,7 +56,7 @@ void set_top_of_ram(uint64_t ramtop)
 }
 #endif /* !__PRE_RAM__ */
 
-#if CONFIG_BROKEN_CAR_MIGRATE || !defined(__PRE_RAM__)
+#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
 unsigned long __attribute__((weak)) get_top_of_ram(void)
 {
 	printk(BIOS_WARNING, "WARNING: you need to define get_top_of_ram() for your chipset\n");

src/northbridge/amd/agesa/Kconfig

@@ -20,6 +20,7 @@
 config NORTHBRIDGE_AMD_AGESA
 	bool
 	default CPU_AMD_AGESA
+	select LATE_CBMEM_INIT
 
 if NORTHBRIDGE_AMD_AGESA
 

src/northbridge/amd/amdfam10/Kconfig

@@ -25,6 +25,7 @@ config NORTHBRIDGE_AMD_AMDFAM10
 	select HYPERTRANSPORT_PLUGIN_SUPPORT
 	select MMCONF_SUPPORT
 	select PER_DEVICE_ACPI_TABLES
+	select LATE_CBMEM_INIT
 
 if NORTHBRIDGE_AMD_AMDFAM10
 config AGP_APERTURE_SIZE

src/northbridge/amd/amdk8/Kconfig

@@ -24,6 +24,7 @@ config NORTHBRIDGE_AMD_AMDK8
 	select HAVE_DEBUG_CAR
 	select HYPERTRANSPORT_PLUGIN_SUPPORT
 	select PER_DEVICE_ACPI_TABLES
+	select LATE_CBMEM_INIT
 
 if NORTHBRIDGE_AMD_AMDK8
 config AGP_APERTURE_SIZE

src/northbridge/amd/gx2/Kconfig

@@ -20,6 +20,7 @@
 config NORTHBRIDGE_AMD_GX2
 	bool
 	select GEODE_VSA
+	select LATE_CBMEM_INIT
 
 if NORTHBRIDGE_AMD_GX2
 

src/northbridge/amd/lx/Kconfig

@@ -1,6 +1,7 @@
 config NORTHBRIDGE_AMD_LX
 	bool
 	select GEODE_VSA
+	select LATE_CBMEM_INIT
 
 if NORTHBRIDGE_AMD_LX
 

src/northbridge/amd/pi/Kconfig

@@ -20,6 +20,7 @@
 config NORTHBRIDGE_AMD_PI
         bool
         default CPU_AMD_PI
+	select LATE_CBMEM_INIT
 
 if NORTHBRIDGE_AMD_PI
 

src/northbridge/dmp/vortex86ex/Kconfig

@@ -19,3 +19,4 @@
 
 config NORTHBRIDGE_DMP_VORTEX86EX
 	bool
+	select LATE_CBMEM_INIT

src/northbridge/intel/e7501/Kconfig

@@ -2,4 +2,5 @@ config NORTHBRIDGE_INTEL_E7501
 	bool
 	select HAVE_DEBUG_RAM_SETUP
 	select PER_DEVICE_ACPI_TABLES
+	select LATE_CBMEM_INIT
 

src/northbridge/intel/e7505/Kconfig

@@ -26,6 +26,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select HAVE_DEBUG_RAM_SETUP
 	select PER_DEVICE_ACPI_TABLES
+	select LATE_CBMEM_INIT
 
 config HW_SCRUBBER
 	bool

src/northbridge/intel/i3100/Kconfig

@@ -1,5 +1,6 @@
 config NORTHBRIDGE_INTEL_I3100
 	bool
+	select LATE_CBMEM_INIT
 
 if NORTHBRIDGE_INTEL_I3100
 config DIMM_MAP_LOGICAL

src/northbridge/intel/i440bx/Kconfig

@@ -20,6 +20,7 @@
 config NORTHBRIDGE_INTEL_I440BX
 	bool
 	select HAVE_DEBUG_RAM_SETUP
+	select LATE_CBMEM_INIT
 
 config SDRAMPWR_4DIMM
 	bool

src/northbridge/intel/i440lx/Kconfig

@@ -20,4 +20,5 @@
 config NORTHBRIDGE_INTEL_I440LX
 	bool
 	select HAVE_DEBUG_RAM_SETUP
+	select LATE_CBMEM_INIT
 

src/northbridge/intel/i5000/Kconfig

@@ -22,6 +22,7 @@ config NORTHBRIDGE_INTEL_I5000
 	select MMCONF_SUPPORT
 	select MMCONF_SUPPORT_DEFAULT
 	select HAVE_DEBUG_RAM_SETUP
+	select LATE_CBMEM_INIT
 
 if NORTHBRIDGE_INTEL_I5000
 

src/northbridge/intel/i82810/Kconfig

@@ -20,6 +20,7 @@
 config NORTHBRIDGE_INTEL_I82810
 	bool
 	select HAVE_DEBUG_RAM_SETUP
+	select LATE_CBMEM_INIT
 
 choice
 	prompt "Onboard graphics"

src/northbridge/intel/i82830/Kconfig

@@ -1,6 +1,7 @@
 config NORTHBRIDGE_INTEL_I82830
 	bool
 	select HAVE_DEBUG_RAM_SETUP
+	select LATE_CBMEM_INIT
 
 choice
 	prompt "Onboard graphics"

src/northbridge/intel/i855/Kconfig

@@ -1,6 +1,7 @@
 config NORTHBRIDGE_INTEL_I855
 	bool
         select HAVE_DEBUG_RAM_SETUP
+	select LATE_CBMEM_INIT
 
 choice
         prompt "Onboard graphics"

src/northbridge/intel/sch/Kconfig

@@ -21,6 +21,7 @@ config NORTHBRIDGE_INTEL_SCH
 	bool
 	select MMCONF_SUPPORT
 	select PER_DEVICE_ACPI_TABLES
+	select LATE_CBMEM_INIT
 
 if NORTHBRIDGE_INTEL_SCH
 

src/northbridge/rdc/r8610/Kconfig

@@ -1,2 +1,3 @@
 config NORTHBRIDGE_RDC_R8610
 	bool
+	select LATE_CBMEM_INIT

src/northbridge/via/cn700/Kconfig

@@ -1,6 +1,7 @@
 config NORTHBRIDGE_VIA_CN700
 	bool
 	select HAVE_DEBUG_RAM_SETUP
+	select LATE_CBMEM_INIT
 
 # TODO: Values are from the CX700 datasheet, not sure if this matches CN700.
 # TODO: What should be the per-chipset default value here?

src/northbridge/via/cx700/Kconfig

@@ -5,6 +5,7 @@ config NORTHBRIDGE_VIA_CX700
 	select HAVE_HARD_RESET
 	select IOAPIC
 	select SMP
+	select LATE_CBMEM_INIT
 
 # TODO: What should be the per-chipset default value here?
 choice

src/northbridge/via/vx800/Kconfig

@@ -2,4 +2,5 @@ config NORTHBRIDGE_VIA_VX800
 	bool
 	select HAVE_DEBUG_RAM_SETUP
 	select HAVE_DEBUG_SMBUS
+	select LATE_CBMEM_INIT
 

src/northbridge/via/vx900/Kconfig

@@ -26,6 +26,7 @@ config NORTHBRIDGE_VIA_VX900
 	select HAVE_HARD_RESET
 	select MMCONF_SUPPORT
 	select MMCONF_SUPPORT_DEFAULT
+	select LATE_CBMEM_INIT
 
 if NORTHBRIDGE_VIA_VX900